2009-05-23  Added part 51 of the FPGA design from scratch story.

2009-01-05 Updated my wild skating blog

2008-10-10  Added part 50 of the FPGA design from scratch story.

2008-09-26  Added part 49 of the FPGA design from scratch story.

2008-07-07 ZooCad Consulting welcomes you. www.zoocad.com

2008-06-14  The SystemC from scratch story can now be reached from www.systemcfromscratch.com

2008-06-06 Starting my SystemC from scratch story.

2008-04-18 Bed and Breakfast 4trappor has opened.

2008-02-11  Continuing the FPGA design from scratch story.

2007-03-15  The FPGA design from scratch can now be reached from www.fpgafromscratch.com

2007-03-01  The Tour skating in Sweden and around the world can now be reached from www.wildskating.com

It all started back in 1992. My design group at Ericsson was designing a multiprocessor board using Motorola 88000 microprocessors. We needed some fast glue-logic and decided to use Motorola H4C ASICs (0.7um CMOS) to design this logic. I was responsible for the testlogic design, including the tap controller and the boundary scan implementation and was going to use the Verilog hardware description language (HDL) for the first time. I had been to a Verilog training course and I had learned how to use Verilog-XL. Most of time I was debugging my design blocks using Verilog-XL in interactive mode. All the commands had to be written and executed from the command line. Moving up and down the design hierarchy involved many $scopes and $showscopes commands. To save time and typing I decided to create a graphical user interface (GUI) and put all these commands behind buttons and menus.

At that time all our computer work was done on SUN SPARC machines with the  SUN OS 4 operating system. SUN Microsystems was using OPEN LOOK user interface with the XView toolkit and had a graphical interface builder called Devguide. I started to use this tool and could easily design very nice graphical interfaces. At the same time I learned how to program in "C" and then everything fell into place. My first tool was called VeriSmart.

VeriSmart Simulation Workbench






MultiSmart Cosimulation Workbench

One year later we needed support for co-simulation, running up to six simulations at the same time. The communication between the simulations was done using file semaphores. To support this simulation setup I developed MultiSmart.



Cobra Command Center

Back in those old days the only terminal emulator window you had access to was cmdtool or shelltool. I guess xterm was around but I hadn't  heard about it. cmdtool and shelltool did not offer anything more than a window to type commands in. The only difference between the two was that cmdtool had a scrolling window. I decided to build my own terminal emulator, Cobra Command Center. I started with a plain cmdtool window and began adding new features.

1. A file tree browser.



2. A menu to support a number of file operations in the file tree.



3. A file list browser.




When there are too many files in a directory a file list browser makes more sense. It also has a filter function that lets you filter out only the files you are interesting in.

4. A command list manager.



The command list manager lets you store all your "always forgot" commands. To execute a command double-click it.

5. Bookmarks



The Bookmark Definition window lets you bookmark any directory, source file, executable file, script file, FrameMaker file and PDF file. When selecting a bookmarked file the appropriate action will be taken. For a directory a cd <bookmark> will be executed.

This is what came out of the remodeling process.



Still today I am using Cobra Command Center for 95% of all the terminal work I do, but now the Linux version.

Mongoose Simulation Environment

During my 15 years as an ASIC designer I was involved in more than 25 ASIC design projects. Every time I had to start from scratch to build a new simulation environment. That struggle gave me the idea to start working on the Mongoose Simulation Environment.



Why using the Mongoose Simulation Environment:

• Save time. Faster setup time. Easier to find files.
  
• A common interface to all simulators (ModelSim, NCSIM, VCS)
• Full support for both interactive and batch simulations
• Seamless integration of Specman
• Clearcase support for revision control
  
• LSF batch queue handling

Read more about using Mongoose in the FPGA design from scratch story.

Zebra Verilog Design Explorer

When designing an ASIC using Verilog HDL you will end up with a huge number of Verilog source files stored in many different directories. When debugging the design you need fast access to all these files to make changes and rerun your simulations. Zebra Verilog Design Explorer will make that process a very fast and efficient one. Just open the Design Tree Browser and display the part of the design tree you are interested in. Than simply mark the module you would like to change and load it to the text editor window.




The Zebra Design Tree Browser.





Topi - Top Code Generator

Ever heard of table driven design. That is exactly what Topi is all about. When designing an ASIC with more than 1000 signal pins you need an exact and precise way of adding all the signal names. Topi will help you generate the top testbench, the top instantiation and the ASIC pinlayout in the same tool.




Topi Pin Table Editor



Topi Pin Layout Editor




Porting Unix programs to Linux

Today it is hard to find a SUN SPARC workstation and most of the engineering work is done on Linux based computers or PC. Some years ago I decided to move my Zoo Design Platform to the Linux platform. This was a fairly simple process because all the xview libraries had been converted to Linux.

Porting a Unix program to Mac OS X

As a last step I ported one of the programs to Mac OS X. When Apple moved to Intel based computers it made things much easier. You can read more about this process here.

Download programs

All the programs can be download from www.zoocad.com/zoodesign_download.html.

Summary

By now I think you understand why it is called Zoo Design Platform. Here again are all the "animals" in the Zoo.

Tool	Description	Introduced	Mac OS X	Linux
VeriSmart	Verilog Simulation Workbench	1992	No	Yes
MultiSmart	Verilog Cosimulation Workbench	1993	No	Yes
Cobra	Command Center (Smart Terminal)	1995	Yes	Yes
Mongoose	Simulation Environment	1993	No	Yes
Zebra	Verilog Design Explorer	1994	No	Yes
Okapi	VHDL Design Explorer	1994	No	Yes
Topi	Top Code Builder	1995	No	Yes

Welcome to the Zoo!

Top

ISE Design Suite 11

A couple of weeks ago I got an email from Xilinx introducing the latest version of their ISE Design Suite.




Let's take a look to see what they have achieved this time. We will download the product and try it out during the free 30-day evaluation period. Clicking the Download More link takes us here:

 

We will start by downloading the web client.




After downloading the web client the following files appear in our temporary directory. To start the actual ISE 11.1 Design Suite download, execute the commands:

cd to the temp directory
sudo ./xsetup





The welcome page.



After accepting the license agreement we have to select the destination directory.




Select products to install.



We will download the complete package. A whopping 7.6 GB disc space is needed. This will take some time.








When we click the install button the installation will start. If we have a 100Mbit/s internet connection it will take about 10 minutes to finish. With a 1Mbit/s connection it will take 16 hours.




When the installation has finished we are asked for a license. We will start the 30 days evaluation right now.





The license will be sent by email.




When we have the license file we can use this page to copy it to a location (the .Xilinx directory located in your home directory) where it can be read by the ISE design suite tools.

Use the command xlcm to start the License Configuration Manager.




We are ready to start using the ISE 11.1 Design Suite.

MicroBlaze 7.1

The first time we looked at the MicroBlaze processor was in part13 of our story. Now it is time to take a new look and see what has happened. We will find out by reading the MicroBlaze Processor Reference Guide (UG081 v9.0) found in the doc directory.

Overview

The MicroBlaze embedded processor soft core is a reduced instruction set computer (RISC) optimized for implementation in Xilinx FPGAs. The figure shows a functional block diagram of the MicroBlaze core.



Features

The MicroBlaze soft core processor is highly configurable, allowing you to select a specific set of features required by your design. The fixed feature set of the processor includes:

• Thirty-two 32-bit general purpose registers
• 32-bit instruction word with three operands and two addressing modes
• 32-bit address bus
• Single issue pipeline

In addition to these fixed features, the MicroBlaze processor is parameterized to allow selective enabling of additional functionality. Older (deprecated) versions of MicroBlaze support a subset of the optional features. Only the latest (preferred) version of MicroBlaze (v7.1) supports all options.
Xilinx recommends that all new designs use the latest preferred version of the MicroBlaze processor.

Memory Managemant Unit (MMU)

The most important update to MicroBlaze processor is the addition of a memory management unit. The MMU allows the MicroBlaze softcore to run complex OSes such as Linux, including LynuxWorks's commercially supported BlueCat-ME (MicroBlaze Edition) distribution. Let's find out how it all works by studying the reference guide.

Virtual-Memory Managemant

Programs running on MicroBlaze use effective addresses to access a flat 4 GB address space. The processor can interpret this address space in one of two ways, depending on the translation mode:

• In real mode, effective addresses are used to directly access physical memory
• In virtual mode, effective addresses are translated into physical addresses by the virtual-memory management hardware in the processor

Virtual mode provides system software with the ability to relocate programs and data anywhere in the physical address space. System software can move inactive programs and data out of physical memory when space is required by active programs and data.

Relocation can make it appear to a program that more memory exists than is actually implemented by the system. This frees the programmer from working within the limits imposed by the amount of physical memory present in a system. Programmers do not need to know which physical-memory addresses are assigned to other software processes and hardware devices. The addresses visible to programs are translated into the appropriate physical addresses by the processor.

Virtual mode provides greater control over memory protection. Blocks of memory as small as 1 KB can be individually protected from unauthorized access. Protection and relocation enable system software to support multitasking. This capability gives the appearance of simultaneous or near-simultaneous execution of multiple programs.

The MicroBlaze MMU implementation is based upon PowerPC 405. For details, see the PowerPC Processor Reference Guide document.

The MMU features are summarized as follows:

• Translates effective addresses into physical addresses
• Controls page-level access during address translation
• Provides additional virtual-mode protection control through the use of zones
• Provides independent control over instruction-address and data-address translation and protection
• Supports eight page sizes: 1 kB, 4 kB, 16 kB, 64 kB, 256 kB, 1 MB, 4 MB, and 16 MB. Any combination of page sizes can be used by system software
• Software controls the page-replacement strategy

What can it be used for

We will use it to install the latest version of PetaLinux which now has support for the MMU.

One year later

It is now almost one year since I stopped writing on my FPGA from scratch blog. What has happened at Xilinx the last year. Let's find out. We will download the latest versions of ISE WebPack and EDK and take a look at all the new features. Here is the download page. Here are the ISE Design Suite 10.1 Release Notes.






The current version of ISE and EDK is 10.1 and now they come as a design suite which can be downloaded in one step. Here is a link to the ISE 10.1 Design Suite tutorial.






This time we will use the Webinstall, downloading a small installation program to our hard disk and then start the download of the complete package (almost 6GB). After unzipping the file 10.1_Webinstall.zip we have the following install directory.






We start the installation using the command sudo ./setup. After entering the registraion code the product selection window  appears.





We select to install ISE WebPack, EDK and PlanAhead. After reading and accepting the software license and  deciding where to install the final software, the installation starts.





Depending on our internet connection speed this download will take 1-24 hours. Sit back and relax. When the installation has finished we have the following directory structure added.




Before we can start using the new programs we have the add the setup scripts for both ISE and EDK (settings32.csh or settings32.sh) to our .bashrc startup script. Now we are ready to go.

Let's start with ISE.

-> ise&

The first thing that happens is the display of the "What's New in Xilinx Design Suite 10.1" window in our web browser.





After converting our old database to ISE 10.1 this window displays. It looks very much like before.





No big suprises here, so what about EDK 10.1. Let's start XPS (Xilinx Platform Studio) and find out.

-> xps&



The first thing we have to do is upgrading some of the IP blocks we are using. This wizard will help us.



Some of the IP blocks we have to fix ourselves.




And here is the old familiar XPS startup window.





For us the upgrade of the Microblaze processor is probably the most interesting subject in this new release. Let's take a closer look at Microblaze 7.10a

And one last thing. Don't forget to install the lastest service pack.

I started my company ZooCad Consulting more than one year ago. Now I finally have my website up and running.

Our first example

The best way to learn a new tool or language is to look at some examples already available. The SystemC installation includes a number of examples. Let's take a look at one of them. Here is the example directory.



The FIR filter

We will start with the FIR example. But before we do let's find out a little bit more about FIR filter design. Here is a good place to start: http://www.dspguru.com/info/faqs/firfaq.htm

FIR (Finite Impulse Response) filters are one of two primary types of digital filters used in Digital Signal Processing (DSP) applications (the other type being IIR). Compared to IIR filters, FIR filters offer the following advantages:

• They can easily be designed to be "linear phase" (and usually are). Put simply, linear-phase filters delay the input signal, but don't distort its phase.
• They are simple to implement. On most DSP microprocessors, the FIR calculation can be done by looping a single instruction.
• They are suited to multi-rate applications. By multi-rate, we mean either "decimation" (reducing the sampling rate), "interpolation" (increasing the sampling rate), or both. Whether decimating or interpolating, the use of FIR filters allows some of the calculations to be omitted, thus providing an important computational efficiency. In contrast, if IIR filters are used, each output must be individually calculated, even if it that output will discarded (so the feedback will be incorporated into the filter).
• They have desireable numeric properties. In practice, all DSP filters must be implemented using "finite-precision" arithmetic, that is, a limited number of bits. The use of finite-precision arithmetic in IIR filters can cause significant problems due to the use of feedback, but FIR filters have no feedback, so they can usually be implemented using fewer bits, and the designer has fewer practical problems to solve related to non-ideal arithmetic.
• They can be implemented using fractional arithmetic. Unlike IIR filters, it is always possible to implement a FIR filter using coefficients with magnitude of less than 1.0. (The overall gain of the FIR filter can be adjusted at its output, if desired.) This is an important considertaion when using fixed-point DSP's, because it makes the implementation much simpler.

SystemC FIR example

The SystemC example implements the following program structure:



Running a SystemC simulation

We will start by running a complete SystemC simulation to verify that everything is working. First we goto to the FIR simulation directory:
-> cd /home/svenand/root/projects/SystemC/libraries/systemc-2.2.0/objdir/examples/sysc/fir
We will start by removing all object files: -> rm *.o

Now we can use the makefile that comes with the installation to compile and run the FIR simulation: -> make check
Here is the result:

==> make check
make  fir fir_rtl
make[1]: Entering directory `/home/svenand/root/projects/SystemC/libraries/systemc-2.2.0/objdir/examples/sysc/fir'
g++ -DPACKAGE_NAME="" -DPACKAGE_TARNAME="" -DPACKAGE_VERSION="" -DPACKAGE_STRING="" -DPACKAGE_BUGREPORT=""  -I. -I../../../../examples/sysc/fir -I/home/svenand/root/projects/SystemC/libraries/systemc-2.2.0/include    -Wall -DSC_INCLUDE_FX -O3 -c -o stimulus.o `test -f 'stimulus.cpp' || echo '../../../../examples/sysc/fir/'`stimulus.cpp
g++ -DPACKAGE_NAME="" -DPACKAGE_TARNAME="" -DPACKAGE_VERSION="" -DPACKAGE_STRING="" -DPACKAGE_BUGREPORT=""  -I. -I../../../../examples/sysc/fir -I/home/svenand/root/projects/SystemC/libraries/systemc-2.2.0/include    -Wall -DSC_INCLUDE_FX -O3 -c -o display.o `test -f 'display.cpp' || echo '../../../../examples/sysc/fir/'`display.cpp
g++ -DPACKAGE_NAME="" -DPACKAGE_TARNAME="" -DPACKAGE_VERSION="" -DPACKAGE_STRING="" -DPACKAGE_BUGREPORT=""  -I. -I../../../../examples/sysc/fir -I/home/svenand/root/projects/SystemC/libraries/systemc-2.2.0/include    -Wall -DSC_INCLUDE_FX -O3 -c -o fir.o `test -f 'fir.cpp' || echo '../../../../examples/sysc/fir/'`fir.cpp
g++ -DPACKAGE_NAME="" -DPACKAGE_TARNAME="" -DPACKAGE_VERSION="" -DPACKAGE_STRING="" -DPACKAGE_BUGREPORT=""  -I. -I../../../../examples/sysc/fir -I/home/svenand/root/projects/SystemC/libraries/systemc-2.2.0/include    -Wall -DSC_INCLUDE_FX -O3 -c -o main.o `test -f 'main.cpp' || echo '../../../../examples/sysc/fir/'`main.cpp
g++  -Wall -DSC_INCLUDE_FX -O3   -o fir  stimulus.o display.o fir.o main.o  -L/home/svenand/root/projects/SystemC/libraries/systemc-2.2.0/lib-linux -lsystemc -lm
g++ -DPACKAGE_NAME="" -DPACKAGE_TARNAME="" -DPACKAGE_VERSION="" -DPACKAGE_STRING="" -DPACKAGE_BUGREPORT=""  -I. -I../../../../examples/sysc/fir -I/home/svenand/root/projects/SystemC/libraries/systemc-2.2.0/include    -Wall -DSC_INCLUDE_FX -O3 -c -o fir_fsm.o `test -f 'fir_fsm.cpp' || echo '../../../../examples/sysc/fir/'`fir_fsm.cpp
g++ -DPACKAGE_NAME="" -DPACKAGE_TARNAME="" -DPACKAGE_VERSION="" -DPACKAGE_STRING="" -DPACKAGE_BUGREPORT=""  -I. -I../../../../examples/sysc/fir -I/home/svenand/root/projects/SystemC/libraries/systemc-2.2.0/include    -Wall -DSC_INCLUDE_FX -O3 -c -o fir_data.o `test -f 'fir_data.cpp' || echo '../../../../examples/sysc/fir/'`fir_data.cpp
g++ -DPACKAGE_NAME="" -DPACKAGE_TARNAME="" -DPACKAGE_VERSION="" -DPACKAGE_STRING="" -DPACKAGE_BUGREPORT=""  -I. -I../../../../examples/sysc/fir -I/home/svenand/root/projects/SystemC/libraries/systemc-2.2.0/include    -Wall -DSC_INCLUDE_FX -O3 -c -o main_rtl.o `test -f 'main_rtl.cpp' || echo '../../../../examples/sysc/fir/'`main_rtl.cpp
g++  -Wall -DSC_INCLUDE_FX -O3   -o fir_rtl  stimulus.o display.o fir_fsm.o fir_data.o main_rtl.o  -L/home/svenand/root/projects/SystemC/libraries/systemc-2.2.0/lib-linux -lsystemc -lm
make[1]: Leaving directory `/home/svenand/root/projects/SystemC/libraries/systemc-2.2.0/objdir/examples/sysc/fir'
make  check-TESTS
make[1]: Entering directory `/home/svenand/root/projects/SystemC/libraries/systemc-2.2.0/objdir/examples/sysc/fir'


             SystemC 2.2.0 --- Jun  8 2008 12:54:47
        Copyright (c) 1996-2006 by all Contributors
                    ALL RIGHTS RESERVED
Stimuli : 0 at time 9000
Display : 0  at time 10000
Stimuli : 1 at time 19000
Display : -6  at time 20000
Stimuli : 2 at time 29000
Display : -16  at time 30000
Stimuli : 3 at time 39000
Display : -13  at time 40000
Stimuli : 4 at time 49000
Display : 6  at time 50000
Stimuli : 5 at time 59000
Display : 7  at time 60000
Stimuli : 6 at time 69000
Display : -33  at time 70000
Stimuli : 7 at time 79000
Display : -50  at time 80000
Stimuli : 8 at time 89000
Display : 87  at time 90000
Stimuli : 9 at time 99000
Display : 446  at time 100000
Stimuli : 10 at time 109000
Display : 959  at time 110000
Stimuli : 11 at time 119000
Display : 1495  at time 120000
Stimuli : 12 at time 129000
Display : 1990  at time 130000
Stimuli : 13 at time 139000
Display : 2467  at time 140000
Stimuli : 14 at time 149000
Display : 2960  at time 150000
Stimuli : 15 at time 159000
Display : 3466  at time 160000
Stimuli : 16 at time 169000
Display : 3968  at time 170000
Stimuli : 17 at time 179000
Display : 4470  at time 180000
Stimuli : 18 at time 189000
Display : 4972  at time 190000
Stimuli : 19 at time 199000
Display : 5474  at time 200000
Stimuli : 20 at time 209000
Display : 5976  at time 210000
Stimuli : 21 at time 219000
Display : 6478  at time 220000
Stimuli : 22 at time 229000
Display : 6980  at time 230000
Stimuli : 23 at time 239000
Display : 7482  at time 240000
Simulation of 24 items finished at time 240000
SystemC: simulation stopped by user.
PASS: fir


Congratulations! We have run our first SystemC simulation.

Hardware and software platform

We will use our Ubuntu Linux installation to run all the SystemC simulations. For more information see Installing Ubuntu 7.04 with VMware.

Downloading SystemC libraries

Before we can download the SystemC C++ class libraries from the OSCI web page we must register as a member. After that we can use the OSCI download page: http://www.systemc.org/downloads/standards/ and download the file systemc-2.2.0.tgz.

SystemC 2.2 installation

After unzipping and unpacking (tar zxvf systemc-2.2.0.tgz) the downloaded file (systemc-2.2.0.tgz) we have the following file structure.



SystemC documentation

In the docs directory we find the following documents:

• FuncSpec20.pdf

• IEEE1666_specification

• License.pdf

• SystemS_2_1_features.pdf

• SystemC_2_1_overview.pdf

• UserGuide20.pdf

• WhitePaper.pdf

Install and configure SystemC

We will start by reading the INSTALL file. To build, install and use SystemC we need the GNU c++ compiler (gcc) and the GNU make program (gmake). If you don't have gcc installed on your system use the following command to install everything you need:  sudo apt-get install build-essential

To install SystemC on a Linux system, do the following steps:

1. Change to the top level directory (systemc-2.2)

2. Create a temporary directory, e.g.,

> mkdir objdir

3. Change to the temporary directory, e.g.,

> cd objdir

4. Set the following environment variable(s):

> set CXX=g++

> export CXX

5. Configure the package for your system.

> ../configure

While the 'configure' script is running, which takes a few moments, it prints messages to inform you of the features it is checking. It also detects the platform.

6. Compile the package. For an optimized SystemC library, enter:

> gmake (or you can use make which is actually the same as gmake in Ubuntu)

For a debug SystemC library, enter:

> gmake debug

7. Install the package.

> gmake install

8. At this point you may wish to verify the installation by testing the example suite.

> gmake check

this will compile and run the examples in the subdirectory examples.

Let's start to configure the system

> ../configure

checking build system type... i686-pc-linux-gnu
checking host system type... i686-pc-linux-gnu
checking target system type... i686-pc-linux-gnu
checking for a BSD-compatible install... /usr/bin/install -c
checking whether build environment is sane... yes
/home/svenand/root/projects/SystemC/libraries/systemc-2.2.0/config/missing: Unknown `--run' option
Try `/home/svenand/root/projects/SystemC/libraries/systemc-2.2.0/config/missing --help' for more information
configure: WARNING: `missing' script is too old or missing
checking for gawk... no
checking for mawk... mawk
checking whether make sets $(MAKE)... yes
checking for gcc... gcc
checking for C compiler default output file name... a.out
checking whether the C compiler works... yes
checking whether we are cross compiling... no
checking for suffix of executables...
checking for suffix of object files... o
checking whether we are using the GNU C compiler... yes
checking whether gcc accepts -g... yes
checking for gcc option to accept ANSI C... none needed
checking for style of include used by make... GNU
checking dependency style of gcc... gcc3
checking for g++... g++
checking whether we are using the GNU C++ compiler... yes
checking whether g++ accepts -g... yes
checking dependency style of g++... gcc3
checking for ranlib... ranlib
checking for a BSD-compatible install... /usr/bin/install -c
configure: creating ./config.status
..........
config.status: creating examples/sysc/2.1/Makefile
config.status: creating examples/sysc/2.1/dpipe/Makefile
config.status: creating examples/sysc/2.1/forkjoin/Makefile
config.status: creating examples/sysc/2.1/reset_signal_is/Makefile
config.status: creating examples/sysc/2.1/sc_export/Makefile
config.status: creating examples/sysc/2.1/sc_report/Makefile
config.status: creating examples/sysc/2.1/scx_barrier/Makefile
config.status: creating examples/sysc/2.1/scx_mutex_w_policy/Makefile
config.status: creating examples/sysc/2.1/specialized_signals/Makefile
config.status: executing depfiles commands

Now let's compile everything.
 
>gmake

Making all in src
gmake[1]: Entering directory `/home/svenand/root/projects/SystemC/libraries/systemc-2.2.0/objdir/src'
Making all in sysc
gmake[2]: Entering directory `/home/svenand/root/projects/SystemC/libraries/systemc-2.2.0/objdir/src/sysc'
Making all in kernel
gmake[3]: Entering directory `/home/svenand/root/projects/SystemC/libraries/systemc-2.2.0/objdir/src/sysc/kernel'
g++ -I. -I. -I../../../../src/sysc/kernel -I../../../../src    -Wall -DSC_INCLUDE_FX -O3 -c -o sc_attribute.o `test -f '../../../../src/sysc/kernel/sc_attribute.cpp' || echo '../../../../src/sysc/kernel/'`../../../../src/sysc/kernel/sc_attribute.cpp
g++ -I. -I. -I../../../../src/sysc/kernel -I../../../../src    -Wall -DSC_INCLUDE_FX -O3 -c -o sc_cor_fiber.o `test -f '../../../../src/sysc/kernel/sc_cor_fiber.cpp' || echo '../../../../src/sysc/kernel/'`../../../../src/sysc/kernel/sc_cor_fiber.cpp
g++ -I. -I. -I../../../../src/sysc/kernel -I../../../../src    -Wall -DSC_INCLUDE_FX -O3 -c -o sc_cor_pthread.o `test -f '../../../../src/sysc/kernel/sc_cor_pthread.cpp' || echo '../../../../src/sysc/kernel/'`../../../../src/sysc/kernel/sc_cor_pthread.cpp

.........

To compile and run this example type
   make check
gmake[4]: Leaving directory `/home/svenand/root/projects/SystemC/libraries/systemc-2.2.0/objdir/examples/sysc/2.1/specialized_signals'
gmake[4]: Entering directory `/home/svenand/root/projects/SystemC/libraries/systemc-2.2.0/objdir/examples/sysc/2.1'
gmake[4]: Nothing to be done for `all-am'.
gmake[4]: Leaving directory `/home/svenand/root/projects/SystemC/libraries/systemc-2.2.0/objdir/examples/sysc/2.1'
gmake[3]: Leaving directory `/home/svenand/root/projects/SystemC/libraries/systemc-2.2.0/objdir/examples/sysc/2.1'
gmake[3]: Entering directory `/home/svenand/root/projects/SystemC/libraries/systemc-2.2.0/objdir/examples/sysc'
gmake[3]: Nothing to be done for `all-am'.
gmake[3]: Leaving directory `/home/svenand/root/projects/SystemC/libraries/systemc-2.2.0/objdir/examples/sysc'
gmake[2]: Leaving directory `/home/svenand/root/projects/SystemC/libraries/systemc-2.2.0/objdir/examples/sysc'
Making all in .
gmake[2]: Entering directory `/home/svenand/root/projects/SystemC/libraries/systemc-2.2.0/objdir/examples'
gmake[2]: Nothing to be done for `all-am'.
gmake[2]: Leaving directory `/home/svenand/root/projects/SystemC/libraries/systemc-2.2.0/objdir/examples'
gmake[1]: Leaving directory `/home/svenand/root/projects/SystemC/libraries/systemc-2.2.0/objdir/examples'
Making all in .
gmake[1]: Entering directory `/home/svenand/root/projects/SystemC/libraries/systemc-2.2.0/objdir'
gmake[1]: Nothing to be done for `all-am'.
gmake[1]: Leaving directory `/home/svenand/root/projects/SystemC/libraries/systemc-2.2.0/objdir'

>
and last we install everything.

>gmake install

Making install in src
gmake[1]: Entering directory `/home/svenand/root/projects/SystemC/libraries/systemc-2.2.0/objdir/src'
Making install in sysc
gmake[2]: Entering directory `/home/svenand/root/projects/SystemC/libraries/systemc-2.2.0/objdir/src/sysc'
Making install in kernel
gmake[3]: Entering directory `/home/svenand/root/projects/SystemC/libraries/systemc-2.2.0/objdir/src/sysc/kernel'
gmake[4]: Entering directory `/home/svenand/root/projects/SystemC/libraries/systemc-2.2.0/objdir/src/sysc/kernel'
gmake[4]: Nothing to be done for `install-exec-am'.
/bin/sh ../../../../config/mkinstalldirs /home/svenand/root/projects/SystemC/libraries/systemc-2.2.0/include/sysc/kernel
mkdir /home/svenand/root/projects/SystemC/libraries/systemc-2.2.0/include
mkdir /home/svenand/root/projects/SystemC/libraries/systemc-2.2.0/include/sysc
mkdir /home/svenand/root/projects/SystemC/libraries/systemc-2.2.0/include/sysc/kernel
for file in sc_attribute.h sc_boost.h sc_cmnhdr.h sc_constants.h sc_cor.h sc_dynamic_processes.h sc_event.h sc_except.h sc_externs.h sc_join.h sc_kernel_ids.h sc_macros.h sc_module.h sc_module_name.h sc_object.h sc_process.h sc_process_handle.h sc_reset.h sc_runnable.h sc_sensitive.h sc_spawn.h sc_spawn_options.h sc_simcontext.h sc_time.h sc_ver.h sc_wait.h sc_wait_cthread.h ; do
      /usr/bin/install -c -m 644 ../../../../src/sysc/kernel/$file /home/svenand/root/projects/SystemC/libraries/systemc-2.2.0/include/sysc/kernel/$file;
    done

.............................

Making install in .
gmake[1]: Entering directory `/home/svenand/root/projects/SystemC/libraries/systemc-2.2.0/objdir'
gmake[2]: Entering directory `/home/svenand/root/projects/SystemC/libraries/systemc-2.2.0/objdir'
gmake[2]: Nothing to be done for `install-exec-am'.
for file in AUTHORS COPYING ChangeLog INSTALL LICENSE NEWS README RELEASENOTES docs; do
      d=..;
      if test -d $d/$file; then
        test -d /home/svenand/root/projects/SystemC/libraries/systemc-2.2.0/$file
        || cp -pr $d/$file /home/svenand/root/projects/SystemC/libraries/systemc-2.2.0 || :;
      else
        test -f /home/svenand/root/projects/SystemC/libraries/systemc-2.2.0/$file
        || cp -p $d/$file /home/svenand/root/projects/SystemC/libraries/systemc-2.2.0/$file || :;
      fi;
    done
gmake[2]: Leaving directory `/home/svenand/root/projects/SystemC/libraries/systemc-2.2.0/objdir'
gmake[1]: Leaving directory `/home/svenand/root/projects/SystemC/libraries/systemc-2.2.0/objdir'

To compile and run all examples we execute the following command:

> gmake check

We are now ready to start exploring all features of SystemC. We will do that by looking closer to some of the examples that came with the installation.

I have been struggling with Verilog and VHDL for more than 15 years. It is time to take a step up on the abstraction ladder. You are welcome to join me, I have decided to learn SystemC.



SystemC

SystemC is a single, unified design and verification language that expresses architectural and other system-level attributes in the form of open-source C++ classes. It enables design and verification at the system level, independent of any detailed hardware and software implementation, as well as enabling co-verification with RTL design.
This higher level of abstraction enables considerably faster, more productive architectural trade-off analysis, design, and redesign than is possible at the more detailed RT level. Furthermore, verification of system architecture and other system-level attributes is orders of magnitude faster than that at the pin-accurate, timing-accurate RT level.

More information can be found here: http://www.systemc.org

C++

C or C++ are the language choice for software algorithm and interface specifications because they provide the control and data abstractions necessary to develop compact and efficient system descriptions. Most designers are familiar with these languages and the large number of development tools associated with them.
The SystemC Class Library provides the necessary constructs to model system architecture including hardware timing, concurrency, and reactive behavior that are missing in standard C++. Adding these constructs to C would require proprietary extensions to the language, which is not an acceptable solution for the industry. The C++ object-oriented programming language provides the ability to extend the language through classes, without adding new syntactic constructs. SystemC provides these necessary classes and allows designers to continue to use the familiar C++ language and development tools.

Starting from scratch

I hope you are not to confused after reading this text. We will start from scratch and use as many examples as possible to illustrate all the features of SystemC. I have done some C programming but I have no experience from C++ or SystemC, I promise you. But first some history.

SystemC evolution

The SystemC Class Library has been developed to support system level design. It runs on both PC and UNIX platforms, and is freely downloadable from the web.

The class library is being released in stages. The first stage, release 1.0 (presently at version 1.0.2) provides all the necessary modelling facilities to describe systems similar to those which can be described using a hardware description language, such as VHDL. Version 1.0 provides a simulation kernel, data types appropriate for fixed point arithmetic, communication channels which behave like pieces of wire (signals), and modules to break down a design into smaller parts.

In Release 2.0 (presently at version 2.2.0), the class library has been extensively re-written to provide an upgrade path into true system level design. Features that were "built-in" to version 1.0, such as signals, are now built upon an underlying structure of channels, interfaces, and ports. Events have been provided as a primitive means of triggering behaviour, together with a set of primitive channels such as FIFO and mutex. Version 2.0 allows much more powerful modeling to be achieved by modeling at the level of transactions.

Version 2.1 added a number of features including the ability to spawn processes after simulation has started, and extra callbacks into the operation of the simulation kernel.
In 2005 the language was standardized as IEEE 1666-2005. Version 2.2 of the reference implementation of the class library is currently available and has been updated to comply with the IEEE standard.

In future, Version 3.0 of the class library will be extended to cover modeling of operating systems, to support the development of models of embedded software.
It is also possible to provide additional libraries to support a particular design methodology. Examples of this include the SystemC Verification Library (SCV).
The SystemC Class Library has been developed by a group of companies forming the Open SystemC Initiative (OSCI). For more information, and to download the freely available source code, visit OSCI.

Tutorials

Esperan           http://www.esperan.com/pdf/Esperan_SystemC_tutorial.pdf
Doulos              http://www.doulos.com/knowhow/systemc/tutorial/
ASIC World      http://www.asic-world.com/systemc/tutorial.html
HT-Lab              http://www.ht-lab.com/howto/vh2sc_tut/vh2sc_tut.html
Electrosoft       http://electrosofts.com/systemc/index.html
SCLive                http://sclive.wordpress.com/2008/01/10/systemc-tutorial-threads-methods-and-sc_spawn/

Books

•    Bhasker, Jayram.       A SystemC Primer. Star Galaxy Publishing, 2002.
•    Grotker, Thorsten, Stan Liao, Grant Martin, and Stuart Swan. System Design with SystemC. Kluwer Academic Publishers, 2002.
•    SystemC Golden Reference Guide. Doulos, 2002.
•    SystemC 2.2 Library. This document is available at http://www.systemc.org of the Open SystemC Initiative (OSCI).
•    IEEE Standard SystemC Language Reference Manual. This document is also available at http://www.systemc.org of the Open SystemC Initiative (OSCI).

More books can be found at Amazon.


This was all for to today. I'll be back.

There is more to life than ASIC and FPGA design. That's why me and my wife have opened a bed and breakfast accommodation in the house where we live. The house is over 100 years old and is located in Södermalm close to the heart of Stockholm. Find out more here.