Writing software for our embedded system

• Builds the directory structure as shown here below.
• Copies the necessary source files for the drivers, OSs, and libraries into the processor instance specific area: OUTPUT_DIR/processor_instance_name/libsrc.
• Calls the design rule check (defined as an option in the MDD or MLD file) procedure for each of the drivers, OSs, and libraries visible to the processor.
• Calls the generate Tcl procedure (if defined in the Tcl file associated with an MDD or MLD file) for each of the drivers, OSs, and libraries visible to the processor. This generates the necessary configuration files for each of the drivers, OSs, and libraries in the include directory of the processor.
• Calls the post_generate Tcl procedure (if defined in the Tcl file associated with an MDD or MLD file) for each of the drivers, OSs, and libraries visible to the processor.
• Runs make (with targets include and libs) for the OSs, drivers, and libraries specific to the processor. On Unix platforms (Linux and Solaris), the gmake utility is used, while on NT platforms, make is used for compilation.
• Calls the execs_generate Tcl procedure (if defined in the Tcl file associated with an MDD or MLD file) for each of the drivers, OSs, and libraries visible to the processor.
  

• Number of device instances
• Device ID for each instance
• A Device ID uniquely identifies each hardware device which maps to a device driver. A Device ID is used during initialization to perform the mapping of a device driver to a hardware device.
• Device IDs are typically assigned either by the user or by a system generation tool. It is currently defined as a 16-bit unsigned integer.
• Device base address for each instance
• Device interrupt assignment for each instance if interrupts can be generated.

Here is an example:

/* Definitions for peripheral RS232_UART */
#define XPAR_RS232_UART_BASEADDR 0x40600000
#define XPAR_RS232_UART_HIGHADDR 0x4060FFFF
#define XPAR_RS232_UART_DEVICE_ID 1
#define XPAR_RS232_UART_BAUDRATE 9600
#define XPAR_RS232_UART_USE_PARITY 0
#define XPAR_RS232_UART_ODD_PARITY 0
#define XPAR_RS232_UART_DATA_BITS 8

The xparameters.h file can be found in the include directory.




Software driver source code

During the library generation (

Source code repository




Software device drivers used

To find out which software device drivers are used we can open Software Platform Settings and select Drivers. In the Xilinx Platform Studio SDK select Xilinx Tools->Software Platform Settings. The ETC peripheral has a generic driver assigned as default. We will add our own driver.




SDK project directory

The specified version of the driver source code is stored in the libsrc directory.





Let's take the GPIO driver as an example and look at different source files and their usage.

Header source file (xgpio.h and xgpio_l.h)

The

• The external interfaces for the high level drivers (Layer 1) are contained in a header file with the file name format x<component name>.h.
• The external interfaces for the low level drivers (Layer 0) are contained in a header file with the file name format x<component name>_l.h.

. The functions themselves are defined in the different .c files found in the gpio source directory.

/************************** Function Prototypes *****************************/

/*
 * Initialization functions in xgpio_sinit.c
 */
XStatus XGpio_Initialize(XGpio *InstancePtr, Xuint16 DeviceId);
XGpio_Config *XGpio_LookupConfig(Xuint16 DeviceId);

/*
 * API Basic functions implemented in xgpio.c
 */
XStatus XGpio_CfgInitialize(XGpio *InstancePtr, XGpio_Config *Config,
                            Xuint32 EffectiveAddr);
void    XGpio_SetDataDirection(XGpio *InstancePtr, unsigned Channel,
                               Xuint32 DirectionMask);
Xuint32 XGpio_DiscreteRead(XGpio *InstancePtr, unsigned Channel);
void    XGpio_DiscreteWrite(XGpio *InstancePtr, unsigned Channel, Xuint32 Mask);


Configuration table xgpio_g.c

This file contains configuration tables for all devices that uses the GPIO device driver.

/*
* The configuration table for devices
*/

XGpio_Config XGpio_ConfigTable[] =
{
    {
        XPAR_LEDS_4BIT_DEVICE_ID,
        XPAR_LEDS_4BIT_BASEADDR,
        XPAR_LEDS_4BIT_INTERRUPT_PRESENT,
        XPAR_LEDS_4BIT_IS_DUAL
    },
    {
        XPAR_LEDS_POSITIONS_DEVICE_ID,
        XPAR_LEDS_POSITIONS_BASEADDR,
        XPAR_LEDS_POSITIONS_INTERRUPT_PRESENT,
        XPAR_LEDS_POSITIONS_IS_DUAL
    },
    {
        XPAR_PUSH_BUTTONS_POSITION_DEVICE_ID,
        XPAR_PUSH_BUTTONS_POSITION_BASEADDR,
        XPAR_PUSH_BUTTONS_POSITION_INTERRUPT_PRESENT,
        XPAR_PUSH_BUTTONS_POSITION_IS_DUAL
    },
    {
        XPAR_LCD_16X2_DEVICE_ID,
        XPAR_LCD_16X2_BASEADDR,
        XPAR_LCD_16X2_INTERRUPT_PRESENT,
        XPAR_LCD_16X2_IS_DUAL
    }
};

Adding the ETC software device driver

From the Xilinx documentation it isn't 100% clear how to add a new device driver. Here is how I did it and it seems to work.

1. Edit the ETC_system.mss file and add the etc driver. Like this:

   BEGIN DRIVER
     PARAMETER DRIVER_NAME = etc
     PARAMETER DRIVER_VER = 1.00.a
     PARAMETER HW_INSTANCE = ETC_0
  END

2. Add a new directory called drivers and the subdirectories as shown here:

Using Xilinx Microprocessor Debugger (XMD) and GNU Debugger (GDB), we can debug our embedded application either on the host development system using an instruction set simulator or virtual platform, or on a board that has the FPGA loaded with our hardware bitstream. For more information on the GNU software debugging tools, refer to the Debug Overview. For more information on XMD, see the "Xilinx Microprocessor Debugger (XMD)" chapter in the Embedded System Tools Reference Manual.

Xilinx Microprocessor Debugger (XMD)

The Xilinx Microprocessor Debugger (XMD) is a tool that facilitates debugging programs and verifying systems using the PowerPC 405GP or MicroBlaze microprocessors. We can use it to debug programs running on a hardware board, Cycle-Accurate Instruction Set Simulator (ISS), or MicroBlaze Cycle-Accurate Virtual Platform (VP) system.

XMD provides a Tool Command Language (Tcl) interface. This interface can be used for command line control and debugging of the target as well as for running complex verification test scripts to test a complete system. XMD supports GNU Debugger (GDB) Remote TCP protocol to control debugging of a target. Some graphical debuggers use this interface for debugging, including PowerPC and MicroBlaze GDB (powerpc-eabi-gdb and mb-gdb) and the Platform Studio Software Development Kit (SDK), EDK's Eclipse-based Software IDE. In either case, the debugger connects to XMD running on the same computer or on a remote computer on the Network.

XMD reads Xilinx Microprocessor Project (XMP), Microprocessor Hardware Specification (MHS), and (Microprocessor Software Specification) (MSS) system files to better understand the hardware system on which the program is debugged. The information is used to perform memory range tests, determine MicroBlaze to Microprocessor Debug Module (MDM) connectivity for faster download speeds, and perform other system actions.

MicroBlaze Processor Target

XMD can connect through JTAG to one or more MicroBlaze processors using the opb_mdm Microprocessor Debug Module (MDM) peripheral. XMD can communicate with a ROM monitor such as XMDStub through JTAG or Serial interface. You can also debug programs using built-in Cycle-accurate MicroBlaze ISS.

MicroBlaze MDM hardware target

                                                                                                                  (Courtesy of Xilinx)

Debug session

This example demonstrates a simple debug session with a MicroBlaze MDM target. Basic XMD-based commands are used after connecting to the MDM target using the connect mb mdm.

==> xmd

XMD% connect mb mdm

connect mb mdm
Info:AutoDetecting cable. Please wait.
Info:Reusing 78010001 key.
Info:Reusing FC010001 key.
Info:Connecting to cable (Parallel Port - parport0).
Info: libusb-driver.so version: 2007-05-27 00:37:02.
Info: parport0: Info:baseAddress=0x0Info:, ecpAddress=0x400Info:
Info: LPT base address = 0000h.
Info: ECP base address = 0400h.
Can't open /dev/parport0: Permission denied
Info:LPT port is already in use. rc = FFFFFFFFh
Info:Cable connection failed.
Info:Reusing 79010001 key.
Info:Reusing FD010001 key.
Info:Connecting to cable (Parallel Port - parport1).
Info: libusb-driver.so version: 2007-05-27 00:37:02.
Info:Cable connection failed.
Info:Reusing 7A010001 key.
Info:Reusing FE010001 key.
Info:Connecting to cable (Parallel Port - parport2).
Info: libusb-driver.so version: 2007-05-27 00:37:02.
Info:Cable connection failed.
Info:Reusing 7B010001 key.
Info:Reusing FF010001 key.
Info:Connecting to cable (Parallel Port - parport3).
Info: libusb-driver.so version: 2007-05-27 00:37:02.
Info:Cable connection failed.
Info:Reusing A0010001 key.
Info:Reusing 24010001 key.
Info:Connecting to cable (Usb Port - USB21).
Info:Checking cable driver.
Info:File version of /home/svenand/cad/xilinx91i/bin/lin/xusbdfwu.hex = 1025(dec), 0x0401.
Info:File version of /usr/share/xusbdfwu.hex = 1025(dec), 0x0401.
Info: libusb-driver.so version: 2007-05-27 00:37:02.
Calling setinterface num=0, alternate=0.
DeviceAttach: received and accepted attach for:
  vendor id 0x3fd, product id 0x8, device handle 0x830b558
Info: Cable PID = 0008.
Info: Max current requested during enumeration is 280 mA.
Info: Cable Type = 3, Revision = 0.
Info: Cable Type = 0x0605.
Info: Setting cable speed to 6 MHz.
Info:Cable connection established.
Info:Firmware version = 1025.
Info:CPLD file version = 0012h.
Info:CPLD version = 0012h.

JTAG chain configuration
--------------------------------------------------
Device   ID Code        IR Length    Part Name
 1       0a001093           8        System_ACE
 2       05059093          16        XCF32P
 3       01e58093          10        XC4VFX12
 4       09608093           8        xc95144xl

MicroBlaze Processor Configuration :
-------------------------------------
Version............................6.00.b
No of PC Breakpoints...............2
No of Read Addr/Data Watchpoints...0
No of Write Addr/Data Watchpoints..0
Instruction Cache Support..........off
Data Cache Support.................off
Exceptions  Support................off
FPU  Support.......................off
Hard Divider Support...............off
Hard Multiplier Support............on - (Mul32)
Barrel Shifter Support.............off
MSR clr/set Instruction Support....on
Compare Instruction Support........on

Connected to MDM UART Target
Connected to "mb" target. id = 0
Starting GDB server for "mb" target (id = 0) at TCP port no 1234

Reading registers in MicroBlaze

XMD% rrd

rrd
    r0: 00000000      r8: 00000001     r16: 00000000     r24: 00000000 
    r1: 00001440      r9: 00000008     r17: 00000000     r25: 00000000 
    r2: 000010f8     r10: 00000000     r18: 00000000     r26: 00000000 
    r3: 00000001     r11: 00000000     r19: 00000000     r27: 00000000 
    r4: 00000000     r12: 00000000     r20: 00000000     r28: 00000000 
    r5: 00000000     r13: 00001158     r21: 00000000     r29: 00000000 
    r6: 0000000d     r14: 00000000     r22: 00000000     r30: 00000000 
    r7: 0000000a     r15: 0000005c     r23: 00000000     r31: 00000000 
    pc: 0000007c     msr: 00000000

Load program

Command: dow elf_file_name

XMD% dow SDK_projects/ETC_system_program/Debug/ETC_system_program.elf

dow SDK_projects/ETC_system_program/Debug/ETC_system_program.elf
    section, .vectors.reset: 0x00000000-0x00000003
    section, .vectors.sw_exception: 0x00000008-0x0000000b
    section, .vectors.interrupt: 0x00000010-0x00000013
    section, .vectors.hw_exception: 0x00000020-0x00000023
    section, .text: 0x00000050-0x00000f0b
    section, .init: 0x00000f0c-0x00000f2f
    section, .fini: 0x00000f30-0x00000f4b
    section, .ctors: 0x00000f4c-0x00000f53
    section, .dtors: 0x00000f54-0x00000f5b
    section, .rodata: 0x00000f5c-0x00000f9d
    section, .data: 0x00000fa0-0x00000ffb
    section, .jcr: 0x00000ffc-0x00000fff
    section, .bss: 0x00001000-0x0000143f
Downloaded Program SDK_projects/ETC_system_program/Debug/ETC_system_program.elf
Setting PC with Program Start Address 0x00000000

Set breakpoint

Command : bps <memory_loc>

XMD% bps 0x50
bps 0x50
Setting breakpoint at 0x00000050

Remove breakpoint

Command : bpr <memory_loc>

Display breakpoints

Command : bpl

XMD% bpl
bpl
0: HW BP: Address = 0x00000004
1: SW BP: Address = 0x00000050

Start program execution

Command : con [start_address] or con to continue from breakpoint

XMD% con 0
con
Info:Processor started. Type "stop" to stop processor

RUNNING> XMD% Info:Software Breakpoint 1 Hit, Processor Stopped at 0x00000050

Single step

Command : stp [number_of_instructions]

You can run the Xilinx Microprocessor Debugger (XMD) from a command line and use it exclusively for debugging. Alternately, XMD can serve as a link between the GNU debug option and your target board.

To open XMD from Xilinx Platform Studio (XPS), click Debug > Launch XMD.

The first time you open XMD, you are prompted to set the XMD options, and the XMD Debug Options dialog box opens automatically. Select the settings.

If you want to change the debug option setting later, you can do so by clicking Debug > XMD Target Options.

After you have set the debug options, the XMD terminal command-line window opens. On Startup, XMD does the following:

If an XMD Tcl script is specified, XMD executes the script and quits.

Otherwise, XMD is started in an interactive mode. In this case, XMD does the following:

• Sources the ${HOME}/.xmdrc file. The configuration file can be used to form custom Tcl commands using XMD commands.
• Opens the XMD Socket server, if the -ipcport option is given.
• Loads system Xilinx® Microprocessor Project (XMP) file, if the -xmp option is given.
• Uses Connect option file to connect to processor target, if the -opt option is given.
• If –nx option is not specified, sources the xmd.ini file, if present in the directory.

The XMD% prompt is displayed. From the Tcl prompt, you can use XMD commands for debugging.

For a list of XMD commands, refer to the "Xilinx Microprocessor Debugger (XMD)" chapter of the Embedded System Tools Reference Manual.

Top  Next  Previous

• Paravirtualization
• Adding more memory
• Using two CPUs
• Using a 64 bit OS and 64 bit computer (Intel Core 2 Duo)
  

A hypervisor provides the virtualization abstraction of the underlying computer system. In full virtualization, a guest operating system runs unmodified on a hypervisor. However, improved performance and efficiency is achieved by having the guest operating system communicate with the hypervisor. By allowing the guest operating system to indicate its intent to the hypervisor, each can cooperate to obtain better performance when running in a virtual machine. This type of communication is referred to as paravirtualization.

Enabling paravirtualization

Add the following line vmi.present = TRUE to the file  .vmx found inside the vmware bundle for the virtual machine.

Applications

• Netlist generation
• Bitstream generation

Before we run Simgen let's make sure we have our software project selected in Xilinx Platform Studio. We also make sure we ticked the Marked for BRAM initialization (right-click Project: ETC_system_program).



We invoke Simgen from the Xilinx Platform Studio using the menu command: Simulation->Generate HDL Simulation Files. When the Simgen program has finished we find a new sub directory (simulation) in our xps directory.

  -- Clock generator for fpga_0_DDR_CLK_FB

  process
  begin
    fpga_0_DDR_CLK_FB <= '0';
    loop
      wait for (fpga_0_DDR_CLK_FB_PERIOD/2);
      fpga_0_DDR_CLK_FB <= not fpga_0_DDR_CLK_FB;
    end loop;
  end process;

  -- Clock generator for sys_clk_pin

  process
  begin
    sys_clk_pin <= '0';
    loop
      wait for (sys_clk_pin_PERIOD/2);
      sys_clk_pin <= not sys_clk_pin;
    end loop;
  end process;

  -- Reset Generator for sys_rst_pin

  process
  begin
    sys_rst_pin <= '0';
    wait for (sys_rst_pin_LENGTH);
    sys_rst_pin <= not sys_rst_pin;
    wait;
  end process;

  -- START USER CODE (Do not remove this line)

  -- User: Put your stimulus here. Code in this
  --       section will not be overwritten.

  -- END USER CODE (Do not remove this line)

end architecture STRUCTURE;

configuration ETC_system_tb_conf of ETC_system_tb is
  for STRUCTURE
    for all : ETC_system
      use configuration work.ETC_system_conf;
    end for;
  end for;
end ETC_system_tb_conf;


Modifying the testbench file

We normally run all our simulations in batch mode and we need a simple way to tell how long the simulation will run. Here is one method to run 80000 ns after reset is released.

  process
  begin
    sys_rst_pin <= '0';
    wait for (sys_rst_pin_LENGTH);
    sys_rst_pin <= not sys_rst_pin;
    wait for 800000 ns;
    assert false report "NONE. End of simulation." severity failure;
  end process;


Compiling the BRAM initialization file

We compile the ETC_system_init.vhd together with the wrapper files and store it in the top library.

Compiling the testbench file

We compile the ETC_system_tb.vhd testbench file into the ETC_system_tb library and after elaboration we have the following database structure.



Simulating program execution

Here is the whole sequence to add a new application program to our simulation environment.

1. Compile and link the program
2. Convert the ELF file to a BRAM memory image (ETC_system_init.vhd)
   
3. Compile the ETC_system_init.vhd using ncvhdl
4. Elaborate everything using ncelab
5. Run the simulation using ncsim (ETC_SYSTEM_TB_CONF)
6. Save the waveforms
7. When the simulation has finish look at the waveforms in Simvision.
   

Here is the program.

// The following constant maps to the name of the hardware instances that
// were created in the EDK XPS system.
 
#define GPIO_LCD_DEVICE_ID    XPAR_LCD_16X2_DEVICE_ID
#define GPIO_LED4_DEVICE_ID   XPAR_LEDS_4BIT_DEVICE_ID
#define GPIO_LEDP_DEVICE_ID   XPAR_LEDS_POSITIONS_DEVICE_ID

// The following constant is used to determine which channel of the GPIO is
// used if there are 2 channels supported.

#define LCD_CHANNEL 1
#define LED_CHANNEL 1

// The following are declared globally so they are zeroed and so they are
// easily accessible from a debugger

XGpio GpioLCD;     /* The Instance of the GPIO LCD Driver */
XGpio GpioLED4;    /* The Instance of the GPIO LED4 Driver */
XGpio GpioLEDPOS;  /* The Instance of the GPIO LEDPOS Driver */

int main(void) {  

     XStatus Status;
   
    // Initialize the GPIO component
    Status = XGpio_Initialize(&GpioLCD, GPIO_LCD_DEVICE_ID);
    if (Status != XST_SUCCESS) return XST_FAILURE;
    Status = XGpio_Initialize(&GpioLED4, GPIO_LED4_DEVICE_ID);
    if (Status != XST_SUCCESS) return XST_FAILURE;
    Status = XGpio_Initialize(&GpioLEDPOS, GPIO_LEDP_DEVICE_ID);
    if (Status != XST_SUCCESS) return XST_FAILURE;
  
    // Set the direction for all bits to be outputs
    XGpio_SetDataDirection(&GpioLCD,    LCD_CHANNEL, 0x00);  
    XGpio_SetDataDirection(&GpioLED4,   LED_CHANNEL, 0x00);
    XGpio_SetDataDirection(&GpioLEDPOS, LED_CHANNEL, 0x00);
     
    // Turn on LEDs
    XGpio_DiscreteWrite(&GpioLED4,   LED_CHANNEL, 0xa);  
    XGpio_DiscreteWrite(&GpioLEDPOS, LED_CHANNEL, 0xa);
    // Write to LCD
    XGpio_DiscreteWrite(&GpioLCD,    LCD_CHANNEL, 0xa);
      
    return XST_SUCCESS;

  }

Here is the result.




The simulation runs as expected. One more milestone reached.

To allow for 64 bit addressing two 32 bit worlds are reserved for each vector.

Reset sequence



When a Reset occurs, MicroBlaze flushes the pipeline and starts fetching instructions from the reset vector (address 0x0). The external reset signal is active high and should be asserted for a minimum of 16 cycles.

The branch instruction <b

• Set up any reset, interrupt, and exception vectors as required.
• Set up stack pointer, small-data anchors, and other registers. Refer to Table 10-9 for details.
• Clear the BSS memory regions to zero.
• Invoke language initialization functions, such as C++ constructors.
• Initialize the hardware sub-system.
  
• Set up arguments for the main procedure and invoke it.

• Invoke language cleanup functions, such as C++ destructors.
• De-initialize the hardware sub-system. For example, if the program is being profiled, clean up the profiling sub-system.

1. Clears the .bss section to zero.
2.  Invokes _program_init.
3.  Invokes "constructor" functions (__init).
4. Sets up the arguments for main and invokes main.
5. Invokes "destructor" functions (__fini).
6. Invokes _program_clean and returns.

C program

Here is the first program we are going to use. We load the code into SDK and compile and link it and then convert the load module to a memory image that we can use in our simulation.

#include "xparameters.h"

#define poke(addr,val)     (*(unsigned char*) (addr) = (val))
#define pokew(addr,val)    (*(unsigned*) (addr) = (val))
#define peek(addr)         (*(unsigned char*) (addr))
#define peekw(addr)        (*(unsigned*) (addr))

int main(void) {  

   unsigned char byte_of_data;
   unsigned      word_of_data;
   int           i,j;
 
   // Define GPIO bus as outputs only
   pokew(XPAR_LCD_16X2_BASEADDR+4,0x00);
  
   // Write data to LCD
   pokew(XPAR_LCD_16X2_BASEADDR,0x7f);
   pokew(XPAR_LCD_16X2_BASEADDR,0x00);
   pokew(XPAR_LCD_16X2_BASEADDR,0x2a);
  
   // Stay in this loop
   while(1);
  
   return 0;
  
  }

Program execution

Here is the result.




Looks perfectly fine to me. So far so good. Let's do the same thing using the Xilinx's software drivers. Like this:

//$$INCLUDE
/*************************************************************************/
/*                                                                       */
/*                I N C L U D E   H E A D E R   F I L E S                */
/*                                                                       */
/*************************************************************************/

#include "xparameters.h"
#include "xgpio.h"

//$$DEFINE
/*************************************************************************/
/*                                                                       */
/*                  D E F I N E   C O N S T A N T S                      */
/*                                                                       */
/*************************************************************************/

// The following constant maps to the name of the hardware instances that
// were created in the EDK XPS system.
 
#define GPIO_LCD_DEVICE_ID    XPAR_LCD_16X2_DEVICE_ID

// The following constant is used to determine which channel of the GPIO is
// used for the LCD if there are 2 channels supported.

#define LCD_CHANNEL 1

// The following are declared globally so they are zeroed and so they are
// easily accessible from a debugger

XGpio GpioLCD;     /* The Instance of the GPIO Driver */

//$$MAIN
/*************************************************************************/
/*                                                                       */
/*                        M A I N   P R O G R A M                        */
/*                                                                       */
/*************************************************************************/

int main(void) {  

    XStatus Status;
   
    // Initialize the GPIO component
    Status = XGpio_Initialize(&GpioLCD, GPIO_LCD_DEVICE_ID);
    if (Status != XST_SUCCESS) return XST_FAILURE;
 
    // Set the direction for all bits to be outputs
    XGpio_SetDataDirection(&GpioLCD,    LCD_CHANNEL, 0x00000000);  
 
    // Write data
    XGpio_DiscreteWrite(&GpioLCD,    LCD_CHANNEL, 0x7f);
    XGpio_DiscreteWrite(&GpioLCD,    LCD_CHANNEL, 0x00);
    XGpio_DiscreteWrite(&GpioLCD,    LCD_CHANNEL, 0x2a);
    while(1);
    return XST_SUCCESS;

  }

Before we continue to compile and build a complete application program let's take a look at Xilinx software platform.

Generating the software libraries and BSPs

For more information about Libgen, refer to the "Library Generator (Libgen)" chapter in the Embedded System Tools Reference Manual. For more information on libraries and device drivers, see the OS and Libraries Document Collection.

The software library for the project is created in the project area:  .../microblaze_0/lib/libxil.a
The address map of the system is created in the header file:  .../microblaze_0/include/xparameters.h

A status message appears in the Console window at the bottom of the SDK main window.

• C Compiler (cc1) – The compiler is responsible for most of the optimizations done on the input C code and generating assembly code.
• C++ Compiler (cc1plus) – The compiler is responsible for most of the optimizations done on the input C++ code and generates assembly code.
  

• C source files
• C++ source files
• Assembly files
• Object files
• Linker scripts

• An ELF file; the default output file name is a.out
• Assembly file, if -save-temps or -S option is used
• Object file, if -save-temps or -c option is used
• Preprocessor output, .i or .ii file, if -save-temps option is used

(SDK) from Xilinx to help us accomplish the task. We start SDK from within Xilinx Platform Studio (XPS) using the menu command Software->Launch Platform Studio SDK.




To find out more about how to use SDK we select the Help menu.



When we click the Getting Started book the SDK design checklist is displayed in our web browser.



We are going to use available software drivers in our program. Let's find out how do that by studying the SDK design checklist.

SDK platform settings

Select Xilinx Tools->Software Platform Settings to look at the available software drivers and the current version used.




C program build

Select the menu Project->Properties to display the program build settings.



C header files

We find all header files in the directory .../SDK_projects/microblaze_0_sw_platform/microblaze_0/include.



The file xparameters.h holds information about the LCD_16x2 module. We will include this file in our c-program.

/* Definitions for peripheral LCD_16X2 */
#define XPAR_LCD_16X2_BASEADDR 0x41F0C000
#define XPAR_LCD_16X2_HIGHADDR 0x41F0CFFF
#define XPAR_LCD_16X2_DEVICE_ID 3
#define XPAR_LCD_16X2_INTERRUPT_PRESENT 0
#define XPAR_LCD_16X2_IS_DUAL 0

The GPIO API definitions

The header file xgpio.h contains the software

definition of the Xilinx General Purpose I/O (XGpio) device driver component. This file will also be included in our c-program.


C program examples

We are not going to re-invent the wheel. Let's look for some good examples to copy. In the directory .../edk91i/sw/XilinxProcessorIPLib/drivers/gpio_v2_01_a there are a few good ones.



More program examples

Looking in the directories of the reference system CD the following example files were found (xrom_lcd.c and xrom_lcd.h).



Let's use the functions declared in xrom_lcd.h.

Main program

//$$DEFINE
/*************************************************************************/
/*                                                                       */
/*                  I N C L U D E  &   D E F I N E                       */
/*                                                                       */
/*************************************************************************/

  #include "xparameters.h"
  #include "xgpio.h"
  #include "xutil.h"
  #include "stdio.h"
  #include "xrom_lcd.h"

  // The following constant maps to the name of the hardware instances that
  // were created in the EDK XPS system.
 
  #define GPIO_LCD_DEVICE_ID    XPAR_LCD_16X2_DEVICE_ID
  #define GPIO_LED4_DEVICE_ID   XPAR_LEDS_4BIT_DEVICE_ID
  #define GPIO_LEDP_DEVICE_ID   XPAR_LEDS_POSITIONS_DEVICE_ID

  // The following constant is used to determine which channel of the GPIO is
  // used for the LCD if there are 2 channels supported.

  #define LCD_CHANNEL 1
  #define LED_CHANNEL 1

  // The following are declared globally so they are zeroed and so they are
  // easily accessible from a debugger

  XGpio GpioLCD;     /* The Instance of the LCD GPIO Driver */
  XGpio GpioLED4;    /* The Instance of the LED4 GPIO Driver */
  XGpio GpioLEDPOS;  /* The Instance of the LED Pos GPIO Driver */
 

1. Specify the ELF file to be marked for block RAM (BRAM) initialization by selecting Device Configuration > Program Hardware Settings
2. Select the initialization file (Bootloop, XMDStub, or ELF file) and click Save.

Set address range

We will select a 4k address range and click Generate Addresses to define the Base Address and the High Address for the IP block.



Connecting ports

We will make GPIO_IO an external port. All other ports are left unconnected.




The easy way to add a new block

Probably the easiest way to add a new peripheral is to edit the ETC_system.mhs file. This file will be read when we start XPS and the information will be displayed in the System Assembly window. To add a new GPIO block we can copy one of the existing GPIO block and edit the information to fit our new block. Like this:

BEGIN opb_gpio
 PARAMETER INSTANCE = LEDs_4Bit
 PARAMETER HW_VER = 3.01.b
 PARAMETER C_GPIO_WIDTH = 4
 PARAMETER C_IS_DUAL = 0
 PARAMETER C_IS_BIDIR = 1
 PARAMETER C_ALL_INPUTS = 0
 PARAMETER C_BASEADDR = 0x40040000
 PARAMETER C_HIGHADDR = 0x4004ffff
 BUS_INTERFACE SOPB = mb_opb
 PORT GPIO_IO = fpga_0_LEDs_4Bit_GPIO_IO
END

Copy, paste and edit.

BEGIN opb_gpio
 PARAMETER INSTANCE = LCD_16x2
 PARAMETER HW_VER = 3.01.b
 PARAMETER C_GPIO_WIDTH = 7
 PARAMETER C_IS_DUAL = 0
 PARAMETER C_IS_BIDIR = 1
 PARAMETER C_ALL_INPUTS = 0
 PARAMETER C_BASEADDR = 0x41f0c000
 PARAMETER C_HIGHADDR = 0x41f0cfff
 BUS_INTERFACE SOPB = mb_opb
 PORT GPIO_IO = LCD_16x2_GPIO_IO
END

The next time we start Xilinx Platform Studio the LCD_16x2_GPIO_IO block will be added.


Configure the IP block

Before we can configure the IP block we need to know more about the LCD display on the ML403 evaluation board. Let's read the

.


                                                                                                                                                                   

8-bit write operation

After initial display communication is established, all data transfers are 8-bit ASCII character codes, data bytes or 8-bit addresses. Each 8-bit transfer obviously has to be decomposed into two 4-bit transfers which must be spaced by at least 1μs. Following an 8-bit write operation, there must be an interval of at least 40μs before the next communication. This delay must be increased to 1.64ms following a clear display command.



Programming sequence

Here are all the steps needed to send an 8 bit instruction to the LCD driver in 4 bit mode:

1. Keep LCD_RW low (write mode)
   
2. Set LCD_RS high (data mode)
3. Put data bits 7:4 on the bus (LCD_D7:LCD_D4)
4. Wait 100ns
   
5. Set LCD_E high
6. Wait 300ns
7. Set LCD_E low
8. Wait 1500ns
   
9. Put data bits 3:0 on the bus (LCD_D7:LCD_D4)
10. Wait 100ns
11. Set LCD_E high
12.  Wait 300ns
13. Set LCD_E low
14. Wait 60us
    

• Connect LCD to MicroBlaze using an OPB customer peripheral
• Initial design for Spartan-3E Starter KIT (LCD display control)

It looks like we need seven General Purpose IO pins to control the LCD display. The rest is software. We will set the GPIO Data Bus Width to 7 and leave everything else untouched.




Adding constraints

The following constraints will be added to the constraints file .../ETC/xps/data/ETC_system.ucf

#### Module LCD_16x2 constraints

NET "LCD_16x2_GPIO_IO_pin<0>" LOC="AE13" | IOSTANDARD = LVCMOS33 | TIG ;
NET "LCD_16x2_GPIO_IO_pin<1>" LOC="AC17" | IOSTANDARD = LVCMOS33 | TIG ;
NET "LCD_16x2_GPIO_IO_pin<2>" LOC="AB17" | IOSTANDARD = LVCMOS33 | TIG ;
NET "LCD_16x2_GPIO_IO_pin<3>" LOC="AF12" | IOSTANDARD = LVCMOS33 | TIG ;
NET "LCD_16x2_GPIO_IO_pin<4>" LOC="AE12" | IOSTANDARD = LVCMOS33 | TIG ;
NET "LCD_16x2_GPIO_IO_pin<5>" LOC="AC10" | IOSTANDARD = LVCMOS33 | TIG ;

• ML403 Embedded Processor Reference System (MicroBlaze-based)
• ML403 Embedded Processor Reference System (PoerPC 405-based)
• ML403 DCM Phase Shift Reference System (MicroBlaze-based)