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Table of content

New Horizons
What's new
Starting a blog
Writing a blog
I got a job

SystemC
SystemC from scratch. Part 1
SystemC from scratch. Part 2
SystemC from scratch. Part 3

ASIC/FPGA Design
Table of content
Index
FPGA design from scratch. Part 1
FPGA design from scratch. Part 2
FPGA design from scratch. Part 3
FPGA design from scratch. Part 4
FPGA design from scratch. Part 5
FPGA design from scratch. Part 6
FPGA design from scratch. Part 7
FPGA design from scratch. Part 8
FPGA design from scratch. Part 9
FPGA design from scratch. Part 10
FPGA design from scratch. Part 11
FPGA design from scratch. Part 12
FPGA design from scratch. Part 13
FPGA design from scratch. Part 14
FPGA design from scratch. Part 15
FPGA design from scratch. Part 16
FPGA design from scratch. Part 17
FPGA design from scratch. Part 18
FPGA design from scratch. Part 19
FPGA design from scratch. Part 20
FPGA design from scratch. Part 21
FPGA design from scratch. Part 22
FPGA design from scratch. Part 23
FPGA design from scratch. Part 24
FPGA design from scratch. Part 25
FPGA design from scratch. Part 26
FPGA design from scratch. Part 27
FPGA design from scratch. Part 28
FPGA design from scratch. Part 29
FPGA design from scratch. Part 30
FPGA design from scratch. Part 31
FPGA design from scratch. Part 32
FPGA design from scratch. Part 33
FPGA design from scratch. Part 34
FPGA design from scratch. Part 35
FPGA design from scratch. Part 36
FPGA design from scratch. Part 37
FPGA design from scratch. Part 38
FPGA design from scratch. Part 39
FPGA design from scratch. Part 40
FPGA design from scratch. Part 41
FPGA design from scratch. Part 42
FPGA design from scratch. Part 43
FPGA design from scratch. Part 44
FPGA design from scratch. Part 45
FPGA design from scratch. Part 46
FPGA design from scratch. Part 47
FPGA design from scratch. Part 48
FPGA design from scratch. Part 49
FPGA design from scratch. Part 50
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Jun 5, 2008
SystemC from scratch. Part 1
I have been struggling with Verilog and VHDL for more than 15 years. It is time to take a step up on the abstraction ladder. You are welcome to join me, I have decided to learn SystemC.



SystemC

SystemC is a single, unified design and verification language that expresses architectural and other system-level attributes in the form of open-source C++ classes. It enables design and verification at the system level, independent of any detailed hardware and software implementation, as well as enabling co-verification with RTL design.
This higher level of abstraction enables considerably faster, more productive architectural trade-off analysis, design, and redesign than is possible at the more detailed RT level. Furthermore, verification of system architecture and other system-level attributes is orders of magnitude faster than that at the pin-accurate, timing-accurate RT level.

More information can be found here:
http://www.systemc.org

C++

C or C++ are the language choice for software algorithm and interface specifications because they provide the control and data abstractions necessary to develop compact and efficient system descriptions. Most designers are familiar with these languages and the large number of development tools associated with them.
The SystemC Class Library provides the necessary constructs to model system architecture including hardware timing, concurrency, and reactive behavior that are missing in standard C++. Adding these constructs to C would require proprietary extensions to the language, which is not an acceptable solution for the industry. The C++ object-oriented programming language provides the ability to extend the language through classes, without adding new syntactic constructs. SystemC provides these necessary classes and allows designers to continue to use the familiar C++ language and development tools.


Starting from scratch


I hope you are not to confused after reading this text. We will start from scratch and use as many examples as possible to illustrate all the features of SystemC. I have done some C programming but I have no experience from C++ or SystemC, I promise you. But first some history.

SystemC evolution

The SystemC Class Library has been developed to support system level design. It runs on both PC and UNIX platforms, and is freely downloadable from the web.

The class library is being released in stages. The first stage, release 1.0 (presently at version 1.0.2) provides all the necessary modelling facilities to describe systems similar to those which can be described using a hardware description language, such as VHDL. Version 1.0 provides a simulation kernel, data types appropriate for fixed point arithmetic, communication channels which behave like pieces of wire (signals), and modules to break down a design into smaller parts.

In Release 2.0 (presently at version 2.2.0), the class library has been extensively re-written to provide an upgrade path into true system level design. Features that were "built-in" to version 1.0, such as signals, are now built upon an underlying structure of channels, interfaces, and ports. Events have been provided as a primitive means of triggering behaviour, together with a set of primitive channels such as FIFO and mutex. Version 2.0 allows much more powerful modeling to be achieved by modeling at the level of transactions.

Version 2.1 added a number of features including the ability to spawn processes after simulation has started, and extra callbacks into the operation of the simulation kernel.
In 2005 the language was standardized as IEEE 1666-2005. Version 2.2 of the reference implementation of the class library is currently available and has been updated to comply with the IEEE standard.

In future, Version 3.0 of the class library will be extended to cover modeling of operating systems, to support the development of models of embedded software.
It is also possible to provide additional libraries to support a particular design methodology. Examples of this include the SystemC Verification Library (SCV).
The SystemC Class Library has been developed by a group of companies forming the Open SystemC Initiative (OSCI). For more information, and to download the freely available source code, visit
OSCI.

Tutorials

Esperan          
http://www.esperan.com/pdf/Esperan_SystemC_tutorial.pdf
Doulos              http://www.doulos.com/knowhow/systemc/tutorial/
ASIC World      http://www.asic-world.com/systemc/tutorial.html
HT-Lab              http://www.ht-lab.com/howto/vh2sc_tut/vh2sc_tut.html
Electrosoft      
http://electrosofts.com/systemc/index.html
SCLive                http://sclive.wordpress.com/2008/01/10/systemc-tutorial-threads-methods-and-sc_spawn/

Books

•    Bhasker, Jayram.       A SystemC Primer. Star Galaxy Publishing, 2002.
•    Grotker, Thorsten, Stan Liao, Grant Martin, and Stuart Swan. System Design with SystemC. Kluwer Academic Publishers, 2002.
•    SystemC Golden Reference Guide. Doulos, 2002.
•    SystemC 2.2 Library. This document is available at
http://www.systemc.org of the Open SystemC Initiative (OSCI).
•    IEEE Standard SystemC Language Reference Manual. This document is also available at
http://www.systemc.org of the Open SystemC Initiative (OSCI).

More books can be found at
Amazon.


This was all for to today.
I'll be back.



Posted at 10:51 pm by svenand

Name
June 20, 2009   05:07 PM PDT
 
I started too to study system C.
I did pilot try with a customer and I liked it.
or me system C is a great, license-free and high performance hardware simulator with the C++ as a verification engine.....http://bknpk.no-ip.biz/First_SCV/aisTB.html
svenand
June 8, 2008   09:39 PM PDT
 
Thanks, I'll do my best.

Sven
FPGA Central - FPGA, CPLD
June 8, 2008   07:45 AM PDT
 
Sven,

Great initiative, it is certainly needed. Hope to learn some SystemC from this.

-Vikram
 

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