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FPGA design from scratch. Part 34
Program disassembly
What happened to our c program after we compiled and built it. Let's disassemble the ETC_system_program.elf to find out. We will us the command mb-objdump -d ETC_system_program.elf. Here is the printout:
Assembly code
Disassembly of section .vectors.reset:
00000000 <_start>:
0: b8080050 brai 80 // 50 <_TEXT_START_ADDR>
Disassembly of section .vectors.sw_exception:
00000008 <_vector_sw_exception>:
8: b80801a0 brai 416 // 1a0 <_exception_handler>
Disassembly of section .vectors.interrupt:
00000010 <_vector_interrupt>:
10: b80801bc brai 444 // 1bc <__interrupt_handler>
Disassembly of section .vectors.hw_exception:
00000020 <_vector_hw_exception>:
20: b80801b8 brai 440 // 1b8 <_hw_exception_handler>
Disassembly of section .text:
00000050 <_start1>:
50: 31a003d0 addik r13, r0, 976 // 3d0 <_SDA_BASE_>
54: 304003b0 addik r2, r0, 944 // 3b0 <_SDA2_BASE_>
58: 30200750 addik r1, r0, 1872
5c: b9f40088 brlid r15, 136 // e4 <_crtinit>
60: 80000000 or r0, r0, r0
64: 20210010 addi r1, r1, 16
00000068 <exit>:
68: b8000000 bri 0 // 68 <exit>
0000006c <__do_global_dtors_aux>:
6c: e0600350 lbui r3, r0, 848 // 350 <_essro>
70: 3021ffe4 addik r1, r1, -28
74: f9e10000 swi r15, r1, 0
78: bc030014 beqi r3, 20 // 8c
7c: b8000028 bri 40 // a4
80: f8600338 swi r3, r0, 824 // 338 <p.0>
84: 99fc2000 brald r15, r4
88: 80000000 or r0, r0, r0
8c: e8600338 lwi r3, r0, 824 // 338 <p.0>
90: e8830000 lwi r4, r3, 0
94: be24ffec bneid r4, -20 // 80
98: 30630004 addik r3, r3, 4
9c: 30600001 addik r3, r0, 1
a0: f0600350 sbi r3, r0, 848 // 350 <_essro>
a4: e9e10000 lwi r15, r1, 0
a8: b60f0008 rtsd r15, 8
ac: 3021001c addik r1, r1, 28
000000b0 <frame_dummy>:
b0: e860034c lwi r3, r0, 844 // 34c <_edata>
b4: 3021ffe4 addik r1, r1, -28
b8: f9e10000 swi r15, r1, 0
bc: bc03001c beqi r3, 28 // d8
c0: b0000000 imm 0
c4: 30600000 addik r3, r0, 0
c8: 30a0034c addik r5, r0, 844 // 34c <_edata>
cc: bc03000c beqi r3, 12 // d8
d0: 99fc1800 brald r15, r3
d4: 80000000 or r0, r0, r0
d8: e9e10000 lwi r15, r1, 0
dc: b60f0008 rtsd r15, 8
e0: 3021001c addik r1, r1, 28
000000e4 <_crtinit>:
e4: 2021ffec addi r1, r1, -20
e8: f9e10000 swi r15, r1, 0
ec: 20c00350 addi r6, r0, 848 // 350 <_essro>
f0: 20e00350 addi r7, r0, 848 // 350 <_essro>
f4: 06463800 rsub r18, r6, r7
f8: bc720014 blei r18, 20 // 10c
fc: f8060000 swi r0, r6, 0
100: 20c60004 addi r6, r6, 4
104: 06463800 rsub r18, r6, r7
108: bc92fff4 bgti r18, -12 // fc
10c: 20c00350 addi r6, r0, 848 // 350 <_essro>
110: 20e0035c addi r7, r0, 860 // 35c <__bss_end>
114: 06463800 rsub r18, r6, r7
118: bc720014 blei r18, 20 // 12c
11c: f8060000 swi r0, r6, 0
120: 20c60004 addi r6, r6, 4
124: 06463800 rsub r18, r6, r7
128: bc92fff4 bgti r18, -12 // 11c
12c: b9f40084 brlid r15, 132 // 1b0 <_program_init>
130: 80000000 or r0, r0, r0
134: b9f401ac brlid r15, 428 // 2e0 <_etext>
138: 80000000 or r0, r0, r0
13c: 20c00000 addi r6, r0, 0
140: 20e00000 addi r7, r0, 0
144: b9f40024 brlid r15, 36 // 168 <main>
148: 20a00000 addi r5, r0, 0
14c: b9f401b8 brlid r15, 440 // 304 <__fini>
150: 80000000 or r0, r0, r0
154: b9f40054 brlid r15, 84 // 1a8 <_program_clean>
158: 80000000 or r0, r0, r0
15c: c9e10000 lw r15, r1, r0
160: b60f0008 rtsd r15, 8
164: 20210014 addi r1, r1, 20
00000168 <main>:
168: 3021ffe8 addik r1, r1, -24
16c: fa610014 swi r19, r1, 20
170: 12610000 addk r19, r1, r0
174: b00041f0 imm 16880
178: f800c004 swi r0, r0, -16380
17c: 3060007f addik r3, r0, 127
180: b00041f0 imm 16880
184: f860c000 swi r3, r0, -16384
188: b00041f0 imm 16880
18c: f800c000 swi r0, r0, -16384
190: 3060002a addik r3, r0, 42
194: b00041f0 imm 16880
198: f860c000 swi r3, r0, -16384
19c: b8000000 bri 0 // 19c
000001a0 <_exception_handler>:
1a0: b6110000 rtsd r17, 0
1a4: 80000000 or r0, r0, r0
000001a8 <_program_clean>:
1a8: b60f0008 rtsd r15, 8
1ac: 80000000 or r0, r0, r0
000001b0 <_program_init>:
1b0: b60f0008 rtsd r15, 8
1b4: 80000000 or r0, r0, r0
000001b8 <_hw_exception_handler>:
1b8: b8000000 bri 0 // 1b8 <_hw_exception_handler>
000001bc <__interrupt_handler>:
1bc: 3021ffb0 addik r1, r1, -80
1c0: f9e10000 swi r15, r1, 0
1c4: f8610020 swi r3, r1, 32
1c8: f8810024 swi r4, r1, 36
1cc: f8a10028 swi r5, r1, 40
1d0: f8c1002c swi r6, r1, 44
1d4: f8e10030 swi r7, r1, 48
1d8: f9010034 swi r8, r1, 52
1dc: f9210038 swi r9, r1, 56
1e0: f941003c swi r10, r1, 60
1e4: f9610040 swi r11, r1, 64
1e8: f9810044 swi r12, r1, 68
1ec: fa210048 swi r17, r1, 72
1f0: 95608001 mfs r11, rmsr
1f4: e8a00340 lwi r5, r0, 832
1f8: e860033c lwi r3, r0, 828 // 33c <MB_InterruptVectorTable>
1fc: fa41004c swi r18, r1, 76
200: f961001c swi r11, r1, 28
204: 99fc1800 brald r15, r3
208: 80000000 or r0, r0, r0
20c: e9e10000 lwi r15, r1, 0
210: e961001c lwi r11, r1, 28
214: e8610020 lwi r3, r1, 32
218: e8810024 lwi r4, r1, 36
21c: 940bc001 mts rmsr, r11
220: e8a10028 lwi r5, r1, 40
224: e8c1002c lwi r6, r1, 44
228: e8e10030 lwi r7, r1, 48
22c: e9010034 lwi r8, r1, 52
230: e9210038 lwi r9, r1, 56
234: e941003c lwi r10, r1, 60
238: e9610040 lwi r11, r1, 64
23c: e9810044 lwi r12, r1, 68
240: ea210048 lwi r17, r1, 72
244: ea41004c lwi r18, r1, 76
248: b62e0000 rtid r14, 0
24c: 30210050 addik r1, r1, 80
00000250 <microblaze_register_handler>:
250: f8a0033c swi r5, r0, 828 // 33c <MB_InterruptVectorTable>
254: f8c00340 swi r6, r0, 832
258: b60f0008 rtsd r15, 8
25c: 80000000 or r0, r0, r0
00000260 <XAssert>:
260: e8600354 lwi r3, r0, 852 // 354 <XAssertCallbackRoutine>
264: 3021ffe4 addik r1, r1, -28
268: f9e10000 swi r15, r1, 0
26c: bc230018 bnei r3, 24 // 284
270: e8600344 lwi r3, r0, 836 // 344 <XWaitInAssert>
274: bc230000 bnei r3, 0 // 274
278: e9e10000 lwi r15, r1, 0
27c: b60f0008 rtsd r15, 8
280: 3021001c addik r1, r1, 28
284: 99fc1800 brald r15, r3
288: 80000000 or r0, r0, r0
28c: b800ffe4 bri -28 // 270
00000290 <XAssertSetCallback>:
290: f8a00354 swi r5, r0, 852 // 354 <XAssertCallbackRoutine>
294: b60f0008 rtsd r15, 8
298: 80000000 or r0, r0, r0
0000029c <XNullHandler>:
29c: b60f0008 rtsd r15, 8
2a0: 80000000 or r0, r0, r0
000002a4 <__do_global_ctors_aux>:
2a4: 3021ffe0 addik r1, r1, -32
2a8: fa61001c swi r19, r1, 28
2ac: e8600320 lwi r3, r0, 800 // 320 <__CTOR_LIST__>
2b0: 32600320 addik r19, r0, 800 // 320 <__CTOR_LIST__>
2b4: f9e10000 swi r15, r1, 0
2b8: b8000010 bri 16 // 2c8
2bc: 99fc1800 brald r15, r3
2c0: 3273fffc addik r19, r19, -4
2c4: e8730000 lwi r3, r19, 0
2c8: aa43ffff xori r18, r3, -1
2cc: bc32fff0 bnei r18, -16 // 2bc
2d0: e9e10000 lwi r15, r1, 0
2d4: ea61001c lwi r19, r1, 28
2d8: b60f0008 rtsd r15, 8
2dc: 30210020 addik r1, r1, 32
Disassembly of section .init:
000002e0 <__init>:
2e0: 3021fff8 addik r1, r1, -8
2e4: d9e00800 sw r15, r0, r1
2e8: b9fc00b0 bralid r15, 176 // b0 <frame_dummy>
2ec: 80000000 or r0, r0, r0
2f0: b9fc02a4 bralid r15, 676 // 2a4 <__do_global_ctors_aux>
2f4: 80000000 or r0, r0, r0
2f8: c9e00800 lw r15, r0, r1
2fc: b60f0008 rtsd r15, 8
300: 30210008 addik r1, r1, 8
Disassembly of section .fini:
00000304 <__fini>:
304: 3021fff8 addik r1, r1, -8
308: d9e00800 sw r15, r0, r1
30c: b9fc006c bralid r15, 108 // 6c <__do_global_dtors_aux>
310: 80000000 or r0, r0, r0
314: c9e00800 lw r15, r0, r1
318: b60f0008 rtsd r15, 8
31c: 30210008 addik r1, r1, 8
MicroBlaze Software Reference Guide
The MicroBlaze Software Reference Guide will tell us all about writing software for the MicroBlaze soft processor.
System memory layout
How is the system memory allocated. Let's try to find out. Address range 0x00000000-0x0000004f is reserved for reset, exceptions, interrupt and break vectors.
| Event | Vector Address
| Register File Return Address
| | Reset | 0x00000000-0x00000004 | - | User Vector (Exception)
| 0x00000008-0x0000000c | Rx | | Interrrupt | 0x00000010-0x00000014 | R14 | Break
| 0x00000018-0x0000001c | R16 | Hardware Exception
| 0x00000020-0x00000024 | R17 or BTR
| Reserved by Xilinx for future use
| 0x00000028-0x0000004f | - | To allow for 64 bit addressing two 32 bit worlds are reserved for each vector.
Reset sequence
When a Reset occurs, MicroBlaze flushes the pipeline and starts fetching instructions from the reset vector (address 0x0). The external reset signal is active high and should be asserted for a minimum of 16 cycles.
The branch instruction <brai _TEXT_START_ADDR> stored in address 0x0 will be executed (see Simvision plot). _TEXT_START_ADDR marks the start of the executable code.
ELF file content
C routine
| Description | | _start1 | | | exit | End of program loop | | _do_global_dtors_aux | | | frame_dummy | | | _crtinit | | | main | Our program
| _exception_handler
| | _program_clean
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| _program_init
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| _hw_exception_handler
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| __interrupt_handler
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| microblaze_register_handler
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| XAssert
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| XAssertSetCallback
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| XNullHandler
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| __do_global_ctors_aux
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| __init
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| __fini
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Here are some more information about the different files used when compiling and linking a typical MicroBlaze executable.
Startup files
The compiler includes pre-compiled startup and end files in the final link command when forming an executable. Startup files set up the language and the platform environment before your application code executes. The following actions are typically performed by startup files:
- Set up any reset, interrupt, and exception vectors as required.
- Set up stack pointer, small-data anchors, and other registers. Refer to Table 10-9 for details.
- Clear the BSS memory regions to zero.
- Invoke language initialization functions, such as C++ constructors.
- Initialize the hardware sub-system.
- Set up arguments for the main procedure and invoke it.
Similarly, end files are used to include code that must execute after your program ends. The following actions are typically performed by end files:
- Invoke language cleanup functions, such as C++ destructors.
- De-initialize the hardware sub-system. For example, if the program is being profiled, clean up the profiling sub-system.
First stage initialization files
crt0.o
This initialization file is used for programs which are to be executed in standalone mode, without the use of any bootloader or debugging stub such as xmdstub. This CRT populates the reset, interrupt, exception, and hardware exception vectors and invokes the second stage startup routine _crtinit. On returning from _crtinit, it ends the program by infinitely looping in the exit label.
Second stage initialization files
According to the C standard specification, all global and static variables must be initialized to 0. This is a common functionality required by all the CRTs above. Another routine _crtinit is invoked. The _crtinit routine initializes memory in the .bss section of the program. _crtinit is also the wrapper that invokes the main procedure. Before invoking the main procedure, it may invoke other initialization functions. _crtinit is supplied by the following startup files, as described below.
crtinit.o
This is the default second stage C startup file. This startup file performs the following steps:
- Clears the .bss section to zero.
- Invokes _program_init.
- Invokes "constructor" functions (__init).
- Sets up the arguments for main and invokes main.
- Invokes "destructor" functions (__fini).
- Invokes _program_clean and returns.
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Posted at 06:59 pm by svenand
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