New Horizons









Welcome to my blog

My name is Sven Andersson and I
work as a consultant in embedded
system design, implemented in ASIC
and FPGA.
In my spare time I write this blog
and I hope it will inspire others to
learn more about this fantastic field.
I live in Stockholm Sweden and have
my own company

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and ask questions or make comments
about my blog.



Content

New Horizons
What's new
Starting a blog
Writing a blog
Using an RSS reader

Zynq Design From Scratch
Started February 2014
Introduction
Changes and updates
Zynq-7000 All Programmable SoC
ZedBoard and other boards
Computer platform and VirtualBox
Installing Ubuntu
Fixing Ubuntu
Installing Vivado
Starting Vivado
Using Vivado
Lab 1. Create a Zynq project
Lab 1. Build a hardware platform
Lab 1. Create a software application
Lab 1. Connect to ZedBoard
Lab 1. Run a software application
Lab 1. Benchmarking ARM Cortex-A9
Lab 2. Adding a GPIO peripheral
Lab 2. Create a custom HDL module
Lab 2. Connect package pins and implement
Lab 2. Create a software application and configure the PL
Lab 2. Debugging a software application
Running Linux from SD card
Installing PetaLinux
Booting PetaLinux
Connect to ZedBoad via ethernet
Rebuilding the PetaLinux kernel image
Running a DHCP server on the host
Running a TFTP server on the host
PetaLinux boot via U-boot
PetaLinux application development
Fixing the host computer
Running NFS servers
VirtualBox seamless mode
Mounting guest file system using sshfs
PetaLinux. Setting up a web server
PetaLinux. Using cgi scripts
PetaLinux. Web enabled application
Convert from VirtualBox to VMware
Running Linaro Ubuntu on ZedBoard
Running Android on ZedBoard
Lab2. Booting from SD card and SPI flash
Lab2. PetaLinux board bringup
Lab2. Writing userspace IO device driver
Lab2. Hardware debugging
MicroZed quick start
Installing Vivado 2014.1
Lab3. Adding push buttons to our Zynq system
Lab3. Adding an interrupt service routine
Installing Ubuntu 14.04
Installing Vivado and Petalinux 2014.2

Chipotle Verification System
Introduction

EE Times Retrospective Series
It all started more than 40 years ago
My first job as an electrical engineer
The Memory (R)evolution
The Microprocessor (R)evolution

Four soft-core processors
Started January 2012
Introduction
Table of contents
Leon3
MicroBlaze
OpenRISC 1200
Nios II

Using the Spartan-6 LX9 MicroBoard
Started August 2011
Introduction
Table of contents
Problems, fixes and solutions

FPGA Design From Scratch
Started December 2006
Introduction
Table of contents
Index
Acronyms and abbreviations

Actel FPGA design
Designing with an Actel FPGA. Part 1
Designing with an Actel FPGA. Part 2
Designing with an Actel FPGA. Part 3
Designing with an Actel FPGA. Part 4
Designing with an Actel FPGA. Part 5

CAD
A hardware designer's best friend
Zoo Design Platform

Linux
Installing Cobra Command Tool
A processor benchmark

Mac
Porting a Unix program to Mac OS X
Fixing a HyperTerminal in Mac OS X
A dream come true

Running
The New York City Marathon

Skiing/Skating
Kittelfjall Lappland

Tour skating in Sweden and around the world
Top
Introduction
SSSK
Wild skating
Tour day
Safety equipment
A look at the equipment you need
Skate maintenance
Links
Books, photos, films and videos
Weather forecasts

Travel
38000 feet above see level
A trip to Spain
Florida the sunshine state

Photo Albums
Seaside Florida
Ronda Spain
Sevilla Spain
Cordoba Spain
Alhambra Spain
Kittelfjäll Lapland
Landsort Art Walk
Skating on thin ice

Books
100 Power Tips for FPGA Designers

Favorites
Adventures in ASIC
ChipHit
Computer History Museum
DeepChip
Design & Reuse
Dilbert
d9 Tech Blog
EDA Cafe
EDA DesignLine
Eli's tech Blog
Embedded.com
EmbeddedRelated.com
FPGA Arcade
FPGA Blog
FPGA Central
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FPGA World
Lesley Shannon Courses
Mac 2 Ubuntu
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Thursday, June 14, 2007
FPGA design from scratch. Part 33
Simulating the LCD driver

I have been fighting for a few days to the get the LCD driver to display "Hello World" on the LCD without success. Now it's time to setup our simulation environment and run some simulations to try to figure out what is going on. See
part 23 and 24 for more information on how to setup and run a simulation. We can also take a look in EDK System Simulation Tutorial.

C program

Here is the first program we are going to use. We load the code into SDK and compile and link it and then convert the load module to a memory image that we can use in our simulation.

#include "xparameters.h"

#define poke(addr,val)     (*(unsigned char*) (addr) = (val))
#define pokew(addr,val)    (*(unsigned*) (addr) = (val))
#define peek(addr)         (*(unsigned char*) (addr))
#define peekw(addr)        (*(unsigned*) (addr))

int main(void) {  

   unsigned char byte_of_data;
   unsigned      word_of_data;
   int           i,j;
 
   // Define GPIO bus as outputs only
   pokew(XPAR_LCD_16X2_BASEADDR+4,0x00);
  
   // Write data to LCD
   pokew(XPAR_LCD_16X2_BASEADDR,0x7f);
   pokew(XPAR_LCD_16X2_BASEADDR,0x00);
   pokew(XPAR_LCD_16X2_BASEADDR,0x2a);
  
   // Stay in this loop
   while(1);
  
   return 0;
  
  }

Program execution

Here is the result.




Looks perfectly fine to me. So far so good. Let's do the same thing using the Xilinx's software drivers. Like this:

//$$INCLUDE
/*************************************************************************/
/*                                                                       */
/*                I N C L U D E   H E A D E R   F I L E S                */
/*                                                                       */
/*************************************************************************/

#include "xparameters.h"
#include "xgpio.h"

//$$DEFINE
/*************************************************************************/
/*                                                                       */
/*                  D E F I N E   C O N S T A N T S                      */
/*                                                                       */
/*************************************************************************/

// The following constant maps to the name of the hardware instances that
// were created in the EDK XPS system.
 
#define GPIO_LCD_DEVICE_ID    XPAR_LCD_16X2_DEVICE_ID

// The following constant is used to determine which channel of the GPIO is
// used for the LCD if there are 2 channels supported.

#define LCD_CHANNEL 1

// The following are declared globally so they are zeroed and so they are
// easily accessible from a debugger

XGpio GpioLCD;     /* The Instance of the GPIO Driver */

//$$MAIN
/*************************************************************************/
/*                                                                       */
/*                        M A I N   P R O G R A M                        */
/*                                                                       */
/*************************************************************************/

int main(void) {  

    XStatus Status;
   
    // Initialize the GPIO component
    Status = XGpio_Initialize(&GpioLCD, GPIO_LCD_DEVICE_ID);
    if (Status != XST_SUCCESS) return XST_FAILURE;
 
    // Set the direction for all bits to be outputs
    XGpio_SetDataDirection(&GpioLCD,    LCD_CHANNEL, 0x00000000);  
 
    // Write data
    XGpio_DiscreteWrite(&GpioLCD,    LCD_CHANNEL, 0x7f);

    XGpio_DiscreteWrite(&GpioLCD,    LCD_CHANNEL, 0x00);
    XGpio_DiscreteWrite(&GpioLCD,    LCD_CHANNEL, 0x2a);
    while(1);
    return XST_SUCCESS;

  }

Before we continue to compile and build a complete application program let's take a look at Xilinx software platform.

Generating the software libraries and BSPs

The Library Generation tool (Libgen) configures libraries, device drivers, file systems, and interrupt handlers for the embedded processor system, creating a software platform.

For more information about Libgen, refer to the "Library Generator (Libgen)" chapter in the Embedded System Tools Reference Manual. For more information on libraries and device drivers, see the OS and Libraries Document Collection.

To generate the software libraries and BSPs (Board Support Packages), right-click on the specific Software Platform project <microblaze_0_sw_platform> and select Generate Libraries and BSPs . This invokes Libgen.

The software library for the project is created in the project area:  .../microblaze_0/lib/libxil.a
The address map of the system is created in the header file:  .../microblaze_0/include/xparameters.h

A status message appears in the Console window at the bottom of the SDK main window.


The following libraries are generated during the libgen run:

 Library  Description Included
Size 
libc.a Standard C functions compiled for MicroBlaze  Yes
382620
libm.a Math functions
Use -lm
414260
libxil.a Xilinx software drivers
Yes
175302

For more information about the libraries read the document <sa_oslib_libxil_stdc.pdf > found in the directory: .../edk_install/doc/usenglish.

GNU Compiler Tools

EDK includes the GNU compiler (GCC) tools for both the PowerPC™ and MicroBlaze processors. The EDK GNU tools support both the C and C++ languages. The MicroBlaze GNU tools include mb-gcc and mb-g++ compilers, mb-as assembler and mb-ld loader/linker.

The GNU compiler is named mb-gcc for MicroBlaze and powerpc-eabi-gcc for PowerPC. The GNU compiler is a wrapper that calls the following executables:

Pre-processor (cpp0) – This is the first pass invoked by the compiler. The pre-processor replaces all macros with definitions as defined in the source and header files.

Machine and language specific compiler – This compiler works on the pre-processed code, which is the output of the first stage. The language-specific compiler is one of the following:
  • C Compiler (cc1) – The compiler is responsible for most of the optimizations done on the input C code and generating assembly code.
  • C++ Compiler (cc1plus) – The compiler is responsible for most of the optimizations done on the input C++ code and generates assembly code.
Assembler (mb-as for MicroBlaze and powerpc-eabi-as for PowerPC) – The assembly code has mnemonics in assembly language. The assembler converts these to machine language. The assembler also resolves some of the labels generated by the compiler. It creates an object file, which is passed on to the linker.

Linker (mb-ld for MicroBlaze and powerpc-eabi-ld for PowerPC) – The linker links all the object files generated by the assembler. If libraries are provided on the command line, the linker resolves some of the undefined references in the code by linking in some of the functions from the assembler.
For more information read
Embedded System Tools Reference Manual chapter 10.

Input files

The compilers take one or more of the following files as input:
  • C source files
  • C++ source files
  • Assembly files
  • Object files
  • Linker scripts
If not specified, the default linker script embedded in the linker (mb-ld or powerpc-eabi-ld) is used.
In addition to the files mentioned above, the compiler implicitly refers to the libraries files libc.a, libgcc.a, libm.a, and libxil.a.

Output files

The compiler generates the following files as output:
  • An ELF file; the default output file name is a.out
  • Assembly file, if -save-temps or -S option is used
  • Object file, if -save-temps or -c option is used
  • Preprocessor output, .i or .ii file, if -save-temps option is used
Output from SDK build process

When we select Project->Build Project in SDK the following process  takes place.

make all
mb-gcc -c -mno-xl-soft-mul -mxl-pattern-compare -mcpu=v6.00.b -I../../microblaze_0_sw_platform/microblaze_0/include -xl-mode-executable -g -O0 -omain.o ../main.c
 
Building target: ETC_system_program.elf
mb-gcc -o ETC_system_program.elf main.o    -mno-xl-soft-mul -mxl-pattern-compare -mcpu=v6.00.b  -L../../microblaze_0_sw_platform/microblaze_0/lib -xl-mode-executable  
Finished building: ETC_system_program.elf

************** Validating ELF File **************

Validating ELF Section Addresses with Hardware Address Map...
elfcheck -mhs /home/svenand/root/projects/ETC/xps/ETC_system.mhs -p xc4vfx12ff668-10 -xmpdir /home/svenand/root/projects/ETC/xps -pe microblaze_0 ETC_system_program.elf
elfcheck
Xilinx EDK 9.1.01 Build EDK_J_SP1.3
Copyright (c) 1995-2007 Xilinx, Inc.  All rights reserved.

Command Line: elfcheck -mhs /home/svenand/root/projects/ETC/xps/ETC_system.mhs
-p xc4vfx12ff668-10 -xmpdir /home/svenand/root/projects/ETC/xps -pe microblaze_0
ETC_system_program.elf

ELF file    : ETC_system_program.elf

Populating list of memories for processor microblaze_0...

Analyzing file ETC_system_program.elf...

Elfcheck on ETC_system_program.elf completed successfully!

************** Determining Size of ELF File **************

mb-size ETC_system_program.elf
   text       data        bss        dec        hex    filename
   1794        112       1088       2994        bb2    ETC_system_program.elf

Build complete for project ETC_system_program

Program size


The mb-size program displays the size of the text, data and bss parts. The total size is displayed in decimal (dec) and hexadecimal (hex) format.

Text


This section of the object file contains executable program instructions. This section has the
x (executable), r (read-only) and i (initialized) flags. This means that this section can be
assigned to an initialized read-only memory (ROM).

Data

This section contains read-write data. This section has the w (read-write) and the i
(initialized) flags. It must be mapped to initialized random access memory (RAM). It
cannot be mapped to a ROM.

BSS

This section contains un-initialized data. The program stack and the heap are also allocated
to this section. This section has the w (read-write) flag and must be mapped to RAM.


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Posted at 09:45 by svenand

 

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