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Table of content

New Horizons
What's new
Starting a blog
Writing a blog
I got a job

SystemC
SystemC from scratch. Part 1
SystemC from scratch. Part 2
SystemC from scratch. Part 3

ASIC/FPGA Design
Table of content
Index
FPGA design from scratch. Part 1
FPGA design from scratch. Part 2
FPGA design from scratch. Part 3
FPGA design from scratch. Part 4
FPGA design from scratch. Part 5
FPGA design from scratch. Part 6
FPGA design from scratch. Part 7
FPGA design from scratch. Part 8
FPGA design from scratch. Part 9
FPGA design from scratch. Part 10
FPGA design from scratch. Part 11
FPGA design from scratch. Part 12
FPGA design from scratch. Part 13
FPGA design from scratch. Part 14
FPGA design from scratch. Part 15
FPGA design from scratch. Part 16
FPGA design from scratch. Part 17
FPGA design from scratch. Part 18
FPGA design from scratch. Part 19
FPGA design from scratch. Part 20
FPGA design from scratch. Part 21
FPGA design from scratch. Part 22
FPGA design from scratch. Part 23
FPGA design from scratch. Part 24
FPGA design from scratch. Part 25
FPGA design from scratch. Part 26
FPGA design from scratch. Part 27
FPGA design from scratch. Part 28
FPGA design from scratch. Part 29
FPGA design from scratch. Part 30
FPGA design from scratch. Part 31
FPGA design from scratch. Part 32
FPGA design from scratch. Part 33
FPGA design from scratch. Part 34
FPGA design from scratch. Part 35
FPGA design from scratch. Part 36
FPGA design from scratch. Part 37
FPGA design from scratch. Part 38
FPGA design from scratch. Part 39
FPGA design from scratch. Part 40
FPGA design from scratch. Part 41
FPGA design from scratch. Part 42
FPGA design from scratch. Part 43
FPGA design from scratch. Part 44
FPGA design from scratch. Part 45
FPGA design from scratch. Part 46
FPGA design from scratch. Part 47
FPGA design from scratch. Part 48
FPGA design from scratch. Part 49
FPGA design from scratch. Part 50
Links
Acronyms and abbreviations
XCell Journals
CAD
A hardware designer's best friend
Zoo Design Platform
Linux
Installing Ubuntu Linux on a MacBook
Customizing Ubuntu Linux 1
Customizing Ubuntu Linux 2
Upgrading to Ubuntu 7.04
Install Ubuntu 7.04 with VMware
Making the virtual machine run faster
Ubuntu Links
A processor benchmark
Mac
Porting a Unix program to Mac OS X
Fixing a HyperTerminal in Mac OS X
A dream come true
Wireless freedom
Running
The New York City Marathon
Skiing/Skating
Kittelfjäll Lappland
Tour skating in Sweden and around the world
Top
Introduction
SSSK
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Safety equipment
A look at the equipment you need
Skate maintenance
Calendar
Links
Books, photos, films and videos
Weather forecasts
Travel
38000 feet above see level
A trip to Spain
Florida the sunshine state


Example Files
Verilog Testbench Body
Verilog Testcase
Verilog Setup
Simulation Result File
Simulation Report File




Photo Albums
Seaside Florida
Ronda Spain
Sevilla Spain
Cordoba Spain
Alhambra Spain
Kittelfjäll Lapland
Landsort Art Walk
Skating on thin ice


Favorites
Adventures in ASIC
ChipHit
Computer History Museum
Community of Sweden
DeepChip
Design & Reuse
Dilbert
EDA Cafe
EDA DesignLine
Embedded.com
EmbeddedRelated.com
FPGA Arcade
FPGA Blog
FPGA Central
FPGA Journal
FPGA World
MacApper
Mac geekery
Mac 2 Ubuntu
Get Perpendicular
Programmable Logic DesignLine
History of Linux
OpenCores
ORSoC
Simplehelp
SOCcentral
World of ASIC



New York City Marathon




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Jun 1, 2007
FPGA design from scratch. Part 29
Hardware setup

Before we start running application programs. Let's take a look at our hardware setup.


  1. Apple MacBook Intel Core 2 Duo, Mac OS X 10.4.9. VMware Fusion virtual machine with Ubuntu 7.04 installed.
  2. Apple PowerBook G4  setup as a VT100 terminal emulator.  The screen program emulates the HyperTerminal program. We can use any terminal we have available. We just happened to have a PowerBook lying around doing nothing.
  3. Apple CInema Display 23", the main display where ISE and EDK windows are displayed.
  4. Xilinx Platform Cable USB used to communicate with the ML403 evaluation board.
  5. Keyspan USB to Serial converter for connecting to the VT100 terminal.
  6. Xilinx ML403 evaluation board.

Software setup

Read the
EDK Concept, Tools and Techniques guide to find out more about the software flow.

                                                                               (system.bit should be download.bit)
                                                                                                                                     (Courtesy of Xilinx)
Download and execute a simple program

We will use the memory test program TestApp_Memory.c as our first simple example to see if the hardware and software will function on our board.



Start the Xilinx Platform Studio

==> xps &



Download the bitstream

The file system.bit, created after hardware generation (completion of Xflow), is an uninitialized bitstream and does not include the ELF file. It is only when we execute the command to download or update the bitstream that the system.bit and ELF files merge into download.bit.

When we select Device Configuration > Download Bitstream, XPS downloads the bitstream (download.bit file) onto the target board using iMPACT in batch mode. XPS uses the file etc/download.cmd for downloading the bitstream. Because XPS tools are makefile based, the download button calls on the makefile and executes the steps necessary to create the bitstream with the Executable Linked Format (ELF) file populated within the bitstream.

Get program size

To ensure that the compiled TestApp_Memory code fits into the BRAM we will use the command Software->Get Program Size.

At Local date and time: Mon Jun  4 19:46:49 2007
 mb-size /home/svenand/root/projects/ETC/xps/TestApp_Memory/executable.elf started...
   text       data        bss        dec        hex    filename
   3944        332       2064       6340       18c4    /home/svenand/root/projects/ETC/xps/TestApp_Memory/executable.elf

Done!

Running the program

After we downloaded the bitstream the included program will start executing and display the result in the VT100 terminal.



The DDR SDRAM test program TestApp_Memory executes and it passes. We have reach one more
milestone.


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Posted at 11:10 am by svenand

 

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