New Horizons

Welcome to my blog

My name is Sven Andersson and I
work as a consultant in embedded
system design, implemented in ASIC
and FPGA.
In my spare time I write this blog
and I hope it will inspire others to
learn more about this fantastic field.
I live in Stockholm Sweden and have
my own company


You are welcome to contact me
and ask questions or make comments
about my blog.


New Horizons
What's new
Starting a blog
Writing a blog
Using an RSS reader

Zynq Design From Scratch
Started February 2014
Changes and updates
Zynq-7000 All Programmable SoC
ZedBoard and other boards
Computer platform and VirtualBox
Installing Ubuntu
Fixing Ubuntu
Installing Vivado
Starting Vivado
Using Vivado
Lab 1. Create a Zynq project
Lab 1. Build a hardware platform
Lab 1. Create a software application
Lab 1. Connect to ZedBoard
Lab 1. Run a software application
Lab 1. Benchmarking ARM Cortex-A9
Lab 2. Adding a GPIO peripheral
Lab 2. Create a custom HDL module
Lab 2. Connect package pins and implement
Lab 2. Create a software application and configure the PL
Lab 2. Debugging a software application
Running Linux from SD card
Installing PetaLinux
Booting PetaLinux
Connect to ZedBoad via ethernet
Rebuilding the PetaLinux kernel image
Running a DHCP server on the host
Running a TFTP server on the host
PetaLinux boot via U-boot
PetaLinux application development
Fixing the host computer
Running NFS servers
VirtualBox seamless mode
Mounting guest file system using sshfs
PetaLinux. Setting up a web server
PetaLinux. Using cgi scripts
PetaLinux. Web enabled application
Convert from VirtualBox to VMware
Running Linaro Ubuntu on ZedBoard
Running Android on ZedBoard
Lab2. Booting from SD card and SPI flash
Lab2. PetaLinux board bringup
Lab2. Writing userspace IO device driver
Lab2. Hardware debugging
MicroZed quick start
Installing Vivado 2014.1
Lab3. Adding push buttons to our Zynq system
Lab3. Adding an interrupt service routine
Installing Ubuntu 14.04
Installing Vivado and Petalinux 2014.2

Chipotle Verification System

EE Times Retrospective Series
It all started more than 40 years ago
My first job as an electrical engineer
The Memory (R)evolution
The Microprocessor (R)evolution

Four soft-core processors
Started January 2012
Table of contents
OpenRISC 1200
Nios II

Using the Spartan-6 LX9 MicroBoard
Started August 2011
Table of contents
Problems, fixes and solutions

FPGA Design From Scratch
Started December 2006
Table of contents
Acronyms and abbreviations

Actel FPGA design
Designing with an Actel FPGA. Part 1
Designing with an Actel FPGA. Part 2
Designing with an Actel FPGA. Part 3
Designing with an Actel FPGA. Part 4
Designing with an Actel FPGA. Part 5

A hardware designer's best friend
Zoo Design Platform

Installing Cobra Command Tool
A processor benchmark

Porting a Unix program to Mac OS X
Fixing a HyperTerminal in Mac OS X
A dream come true

The New York City Marathon

Kittelfjall Lappland

Tour skating in Sweden and around the world
Wild skating
Tour day
Safety equipment
A look at the equipment you need
Skate maintenance
Books, photos, films and videos
Weather forecasts

38000 feet above see level
A trip to Spain
Florida the sunshine state

Photo Albums
Seaside Florida
Ronda Spain
Sevilla Spain
Cordoba Spain
Alhambra Spain
KittelfjÀll Lapland
Landsort Art Walk
Skating on thin ice

100 Power Tips for FPGA Designers

Adventures in ASIC
Computer History Museum
Design & Reuse
d9 Tech Blog
EDA Cafe
EDA DesignLine
Eli's tech Blog
FPGA Arcade
FPGA Central
FPGA developer
FPGA Journal
FPGA World
Lesley Shannon Courses
Mac 2 Ubuntu
Programmable Logic DesignLine
World of ASIC

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Friday, June 01, 2007
FPGA design from scratch. Part 29
Hardware setup

Before we start running application programs. Let's take a look at our hardware setup.

  1. Apple MacBook Intel Core 2 Duo, Mac OS X 10.4.9. VMware Fusion virtual machine with Ubuntu 7.04 installed.
  2. Apple PowerBook G4  setup as a VT100 terminal emulator.  The screen program emulates the HyperTerminal program. We can use any terminal we have available. We just happened to have a PowerBook lying around doing nothing.
  3. Apple CInema Display 23", the main display where ISE and EDK windows are displayed.
  4. Xilinx Platform Cable USB used to communicate with the ML403 evaluation board.
  5. Keyspan USB to Serial converter for connecting to the VT100 terminal.
  6. Xilinx ML403 evaluation board.

Software setup

Read the
EDK Concept, Tools and Techniques guide to find out more about the software flow.

                                                                               (system.bit should be download.bit)
                                                                                                                                     (Courtesy of Xilinx)
Download and execute a simple program

We will use the memory test program TestApp_Memory.c as our first simple example to see if the hardware and software will function on our board.

Start the Xilinx Platform Studio

==> xps &

Download the bitstream

The file system.bit, created after hardware generation (completion of Xflow), is an uninitialized bitstream and does not include the ELF file. It is only when we execute the command to download or update the bitstream that the system.bit and ELF files merge into download.bit.

When we select Device Configuration > Download Bitstream, XPS downloads the bitstream (download.bit file) onto the target board using iMPACT in batch mode. XPS uses the file etc/download.cmd for downloading the bitstream. Because XPS tools are makefile based, the download button calls on the makefile and executes the steps necessary to create the bitstream with the Executable Linked Format (ELF) file populated within the bitstream.

Get program size

To ensure that the compiled TestApp_Memory code fits into the BRAM we will use the command Software->Get Program Size.

At Local date and time: Mon Jun  4 19:46:49 2007
 mb-size /home/svenand/root/projects/ETC/xps/TestApp_Memory/executable.elf started...
   text       data        bss        dec        hex    filename
   3944        332       2064       6340       18c4    /home/svenand/root/projects/ETC/xps/TestApp_Memory/executable.elf


Running the program

After we downloaded the bitstream the included program will start executing and display the result in the VT100 terminal.

The DDR SDRAM test program TestApp_Memory executes and it passes. We have reach one more

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Posted at 11:10 by svenand

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February 25, 2011   05:00 PM PST
Because XPS tools are makefile based, the download button calls on the makefile and executes the steps necessary to create the bitstream with the Executable Linked Format (ELF) file populated within the bitstream.

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