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Table of content

New Horizons
What's new
Starting a blog
Writing a blog
I got a job

SystemC
SystemC from scratch. Part 1
SystemC from scratch. Part 2
SystemC from scratch. Part 3

ASIC/FPGA Design
Table of content
Index
FPGA design from scratch. Part 1
FPGA design from scratch. Part 2
FPGA design from scratch. Part 3
FPGA design from scratch. Part 4
FPGA design from scratch. Part 5
FPGA design from scratch. Part 6
FPGA design from scratch. Part 7
FPGA design from scratch. Part 8
FPGA design from scratch. Part 9
FPGA design from scratch. Part 10
FPGA design from scratch. Part 11
FPGA design from scratch. Part 12
FPGA design from scratch. Part 13
FPGA design from scratch. Part 14
FPGA design from scratch. Part 15
FPGA design from scratch. Part 16
FPGA design from scratch. Part 17
FPGA design from scratch. Part 18
FPGA design from scratch. Part 19
FPGA design from scratch. Part 20
FPGA design from scratch. Part 21
FPGA design from scratch. Part 22
FPGA design from scratch. Part 23
FPGA design from scratch. Part 24
FPGA design from scratch. Part 25
FPGA design from scratch. Part 26
FPGA design from scratch. Part 27
FPGA design from scratch. Part 28
FPGA design from scratch. Part 29
FPGA design from scratch. Part 30
FPGA design from scratch. Part 31
FPGA design from scratch. Part 32
FPGA design from scratch. Part 33
FPGA design from scratch. Part 34
FPGA design from scratch. Part 35
FPGA design from scratch. Part 36
FPGA design from scratch. Part 37
FPGA design from scratch. Part 38
FPGA design from scratch. Part 39
FPGA design from scratch. Part 40
FPGA design from scratch. Part 41
FPGA design from scratch. Part 42
FPGA design from scratch. Part 43
FPGA design from scratch. Part 44
FPGA design from scratch. Part 45
FPGA design from scratch. Part 46
FPGA design from scratch. Part 47
FPGA design from scratch. Part 48
FPGA design from scratch. Part 49
FPGA design from scratch. Part 50
Links
Acronyms and abbreviations
XCell Journals
CAD
A hardware designer's best friend
Zoo Design Platform
Linux
Installing Ubuntu Linux on a MacBook
Customizing Ubuntu Linux 1
Customizing Ubuntu Linux 2
Upgrading to Ubuntu 7.04
Install Ubuntu 7.04 with VMware
Making the virtual machine run faster
Ubuntu Links
A processor benchmark
Mac
Porting a Unix program to Mac OS X
Fixing a HyperTerminal in Mac OS X
A dream come true
Wireless freedom
Running
The New York City Marathon
Skiing/Skating
Kittelfjäll Lappland
Tour skating in Sweden and around the world
Top
Introduction
SSSK
Wild skating
Tour day
Safety equipment
A look at the equipment you need
Skate maintenance
Calendar
Links
Books, photos, films and videos
Weather forecasts
Travel
38000 feet above see level
A trip to Spain
Florida the sunshine state


Example Files
Verilog Testbench Body
Verilog Testcase
Verilog Setup
Simulation Result File
Simulation Report File




Photo Albums
Seaside Florida
Ronda Spain
Sevilla Spain
Cordoba Spain
Alhambra Spain
Kittelfjäll Lapland
Landsort Art Walk
Skating on thin ice


Favorites
Adventures in ASIC
ChipHit
Computer History Museum
Community of Sweden
DeepChip
Design & Reuse
Dilbert
EDA Cafe
EDA DesignLine
Embedded.com
EmbeddedRelated.com
FPGA Arcade
FPGA Blog
FPGA Central
FPGA Journal
FPGA World
MacApper
Mac geekery
Mac 2 Ubuntu
Get Perpendicular
Programmable Logic DesignLine
History of Linux
OpenCores
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Simplehelp
SOCcentral
World of ASIC



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Apr 9, 2007
FPGA design from scratch. Part 15
EDK is a suite of tools and IP that enables you to design a complete embedded processor system for implementation in a Xilinx FPGA device. To run EDK, ISE must be installed as well. Think of it as an umbrella covering all things related to embedded processor systems and their design.

Xilinx Platform Studio (XPS)

XPS is the development environment or GUI used for designing the hardware portion of your embedded processor system.

Software Development Kit (SDK)

Platform Studio SDK is an integrated development environment, complimentary to XPS, that is used for C/C++ embedded software application creation and verification. SDK is built on the Eclipse™ open-source framework. Because many other software development tools are being built on the Eclipse infrastructure, this software development tool might already be familiar to you or members of your design team.

EDK includes other elements such as:
•    Hardware IP for the Xilinx embedded processors
•    Drivers and libraries for embedded software development
•    GNU Compiler and debugger for C/C++ software development targeting the MicroBlaze™ and PowerPC™ processors
•    Documentation
•    Sample projects

The utilities provided with EDK are designed to assist in all phases of the embedded design process.



                                                                                                                                        
(Courtesy of Xilinx)
Using Xilinx Platform Studio

This is going to be fun. Let's start xps. We will use the
EDK 9.1 MicroBlaze Tutorial in Virtex-4 and the EDK 9.1i Concepts, Tools and Techniques Guide (CTTG) as we go along.

For more documents go to the
Xilinx Platform Studio Documentation.

XPS Design checklist

This page
provides a summary of all necessary steps and commonly used optional steps to complete an embedded processor system design.

==> cd $ETC_PROJECT
==> xps&
[1] 4463
==>
Xilinx Platform Studio
Xilinx EDK 9.1 Build EDK_J.19
Copyright (c) 1995-2007 Xilinx, Inc.  All rights reserved.

Launching XPS GUI...
Overriding Xilinx file <mdtgui/images/xps-splash-screen.bmp> with local file
</home/svenand/cad/edk91i/data/mdtgui/images/xps-splash-screen.bmp>




We will create a new project using the Base System Builder wizard (see chapter 2 in CTTG).



First we have to create a new top-level project file (ETC_system.xmp). A Xilinx Microprocessor Project (XMP) file is the top-level file description of the embedded system under development. All XPS project information is saved in the XMP file, including the location of the Microprocessor Hardware Specification (MHS) and Microprocessor  Software Specification (MSS) files. The MHS and MSS files are described in detail later.




When I click the OK button I get the following error message:

ERROR:PersonalityModule:7 - Unable to open Xilinx data file for Vendor/Device
   Module "qrvirtex2".  Please make sure that it has been correctly installed
   before continuing.


I just realized there is a service pack 1 available for EDK 9.1i. I will download this sevice pack and see if it fixes the problem. The service pack fixed the problem. Sorry to bother you Xilinx.



We would like to create a new design for the ML403 evaluation board.



We will use the MicroBlaze soft processor.



We will use the 100MHz system clock available on the board, an active low reset signal and we will have an on-chip debug module. We don't need memory caches and a floating point unit.



In the next four pages we will select the peripherals to use:



We will change the baudrate to 57600 at a later stage.









The UART will be used for the serial communication between the board and the terminal.



Here are more information about available IO devices:

 IO Device
 Xilinx Name
 Description
RS232 UART UARTLITE opb_uartlite.pdf
IIC EEPROM IIC_EEPROM xapp979.pdf
CompactFlash SysACE_CompactFlash opb_sysace.pdf
USB Cypress_USB xapp925.pdf
DDR SDRAM DDR_SDRAM_64Mx32 DDR/DDR2 SDRAM
Ethernet MACEthernet_MAC
ug074.pdf
SRAMSRAM_256Kx32
Memory corner
Flash memoryFLASH_2Mx32






When we click the Generate button, we will start the generation of our embedded system.




We have now put together our embedded system. We can always go back and add or remove IO interfaces at a later stage. Here is the file tree generated from XPS.



  • blkdiagram - contains the blockdiagram of our system that can be displayed in a web browser (ETC_system.html).
  • data - contains the UCF (user constraints file) for the target board
  • etc - contains system settings for JTAG configuration on the board that is used when downloading the bit file and the default parameters that are passed to the ISE tools
  • pcores - is empty right now, but is utilized for custom peripherals
  • TestApp_Memory - contains a user application in C code source, for testing the memory in the system

Look at project options

Select Project->Project Options to display the current project setup.



Generate a design report file


To generate a design report file select Project->Generate and view design report. The design report will be stored in the report directory and can be viewed in a web browser (ETC_system.html).


Now it's time to add our own IP block, the Embedded Test Controller (ETC). That is the subject of the next part.


Top  Next  Previous


Posted at 08:59 am by svenand

Amit
March 5, 2009   08:56 AM PST
 
Thanks!!
will you please give me a steps what to do after clicking finish? as i am new to EDK.I am trying to run simple Test_mem_App.
anurag
July 1, 2008   10:07 PM PDT
 
thanx a lot.!
yash
March 12, 2008   08:46 AM PDT
 
u made my day mate!was like blind folded and left alone in a jungle b4 i found this!!!Thanks a ton
 

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