New Horizons









Welcome to my blog

My name is Sven Andersson and I
work as a consultant in embedded
system design, implemented in ASIC
and FPGA.
In my spare time I write this blog
and I hope it will inspire others to
learn more about this fantastic field.
I live in Stockholm Sweden and have
my own company

Contact

You are welcome to contact me
and ask questions or make comments
about my blog.



Content

New Horizons
What's new
Starting a blog
Writing a blog
Using an RSS reader

Zynq Design From Scratch
Started February 2014
Introduction
Changes and updates
Zynq-7000 All Programmable SoC
ZedBoard and other boards
Computer platform and VirtualBox
Installing Ubuntu
Fixing Ubuntu
Installing Vivado
Starting Vivado
Using Vivado
Lab 1. Create a Zynq project
Lab 1. Build a hardware platform
Lab 1. Create a software application
Lab 1. Connect to ZedBoard
Lab 1. Run a software application
Lab 1. Benchmarking ARM Cortex-A9
Lab 2. Adding a GPIO peripheral
Lab 2. Create a custom HDL module
Lab 2. Connect package pins and implement
Lab 2. Create a software application and configure the PL
Lab 2. Debugging a software application
Running Linux from SD card
Installing PetaLinux
Booting PetaLinux
Connect to ZedBoad via ethernet
Rebuilding the PetaLinux kernel image
Running a DHCP server on the host
Running a TFTP server on the host
PetaLinux boot via U-boot
PetaLinux application development
Fixing the host computer
Running NFS servers
VirtualBox seamless mode
Mounting guest file system using sshfs
PetaLinux. Setting up a web server
PetaLinux. Using cgi scripts
PetaLinux. Web enabled application
Convert from VirtualBox to VMware
Running Linaro Ubuntu on ZedBoard
Running Android on ZedBoard
Lab2. Booting from SD card and SPI flash
Lab2. PetaLinux board bringup
Lab2. Writing userspace IO device driver
Lab2. Hardware debugging
MicroZed quick start
Installing Vivado 2014.1
Lab3. Adding push buttons to our Zynq system
Lab3. Adding an interrupt service routine
Installing Ubuntu 14.04
Installing Vivado and Petalinux 2014.2
Using Vivado 2014.2
Upgrading to Ubuntu 14.04
Using Petalinux 2014.2
Booting from SD card and SPI flash

Chipotle Verification System
Introduction

EE Times Retrospective Series
It all started more than 40 years ago
My first job as an electrical engineer
The Memory (R)evolution
The Microprocessor (R)evolution

Four soft-core processors
Started January 2012
Introduction
Table of contents
Leon3
MicroBlaze
OpenRISC 1200
Nios II

Using the Spartan-6 LX9 MicroBoard
Started August 2011
Introduction
Table of contents
Problems, fixes and solutions

FPGA Design From Scratch
Started December 2006
Introduction
Table of contents
Index
Acronyms and abbreviations

Actel FPGA design
Designing with an Actel FPGA. Part 1
Designing with an Actel FPGA. Part 2
Designing with an Actel FPGA. Part 3
Designing with an Actel FPGA. Part 4
Designing with an Actel FPGA. Part 5

CAD
A hardware designer's best friend
Zoo Design Platform

Linux
Installing Cobra Command Tool
A processor benchmark

Mac
Porting a Unix program to Mac OS X
Fixing a HyperTerminal in Mac OS X
A dream come true

Running
The New York City Marathon

Skiing/Skating
Kittelfjall Lappland

Tour skating in Sweden and around the world
Top
Introduction
SSSK
Wild skating
Tour day
Safety equipment
A look at the equipment you need
Skate maintenance
Links
Books, photos, films and videos
Weather forecasts

Travel
38000 feet above see level
A trip to Spain
Florida the sunshine state

Photo Albums
Seaside Florida
Ronda Spain
Sevilla Spain
Cordoba Spain
Alhambra Spain
Kittelfjäll Lapland
Landsort Art Walk
Skating on thin ice

Books
100 Power Tips for FPGA Designers

Favorites
Adventures in ASIC
ChipHit
Computer History Museum
DeepChip
Design & Reuse
Dilbert
d9 Tech Blog
EDA Cafe
EDA DesignLine
Eli's tech Blog
Embedded.com
EmbeddedRelated.com
FPGA Arcade
FPGA Blog
FPGA Central
FPGA CPU News
FPGA developer
FPGA Journal
FPGA World
Lesley Shannon Courses
Mac 2 Ubuntu
Programmable Logic DesignLine
OpenCores
Simplehelp
SOCcentral
World of ASIC



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Monday, April 09, 2007
FPGA design from scratch. Part 15
EDK is a suite of tools and IP that enables you to design a complete embedded processor system for implementation in a Xilinx FPGA device. To run EDK, ISE must be installed as well. Think of it as an umbrella covering all things related to embedded processor systems and their design.

Xilinx Platform Studio (XPS)

XPS is the development environment or GUI used for designing the hardware portion of your embedded processor system.

Software Development Kit (SDK)

Platform Studio SDK is an integrated development environment, complimentary to XPS, that is used for C/C++ embedded software application creation and verification. SDK is built on the Eclipse™ open-source framework. Because many other software development tools are being built on the Eclipse infrastructure, this software development tool might already be familiar to you or members of your design team.

EDK includes other elements such as:
•    Hardware IP for the Xilinx embedded processors
•    Drivers and libraries for embedded software development
•    GNU Compiler and debugger for C/C++ software development targeting the MicroBlaze™ and PowerPC™ processors
•    Documentation
•    Sample projects

The utilities provided with EDK are designed to assist in all phases of the embedded design process.



                                                                                                                                        
(Courtesy of Xilinx)
Using Xilinx Platform Studio

This is going to be fun. Let's start xps. We will use the
EDK 9.1 MicroBlaze Tutorial in Virtex-4 and the EDK 9.1i Concepts, Tools and Techniques Guide (CTTG) as we go along.

For more documents go to the
Xilinx Platform Studio Documentation.

XPS Design checklist

This page
provides a summary of all necessary steps and commonly used optional steps to complete an embedded processor system design.

==> cd $ETC_PROJECT
==> xps&
[1] 4463
==>
Xilinx Platform Studio
Xilinx EDK 9.1 Build EDK_J.19
Copyright (c) 1995-2007 Xilinx, Inc.  All rights reserved.

Launching XPS GUI...
Overriding Xilinx file <mdtgui/images/xps-splash-screen.bmp> with local file
</home/svenand/cad/edk91i/data/mdtgui/images/xps-splash-screen.bmp>




We will create a new project using the Base System Builder wizard (see chapter 2 in CTTG).



First we have to create a new top-level project file (ETC_system.xmp). A Xilinx Microprocessor Project (XMP) file is the top-level file description of the embedded system under development. All XPS project information is saved in the XMP file, including the location of the Microprocessor Hardware Specification (MHS) and Microprocessor  Software Specification (MSS) files. The MHS and MSS files are described in detail later.




When I click the OK button I get the following error message:

ERROR:PersonalityModule:7 - Unable to open Xilinx data file for Vendor/Device
   Module "qrvirtex2".  Please make sure that it has been correctly installed
   before continuing.


I just realized there is a service pack 1 available for EDK 9.1i. I will download this sevice pack and see if it fixes the problem. The service pack fixed the problem. Sorry to bother you Xilinx.



We would like to create a new design for the ML403 evaluation board.



We will use the MicroBlaze soft processor.



We will use the 100MHz system clock available on the board, an active low reset signal and we will have an on-chip debug module. We don't need memory caches and a floating point unit.



In the next four pages we will select the peripherals to use:



We will change the baudrate to 57600 at a later stage.









The UART will be used for the serial communication between the board and the terminal.



Here are more information about available IO devices:

 IO Device
 Xilinx Name
 Description
RS232 UART UARTLITE opb_uartlite.pdf
IIC EEPROM IIC_EEPROM xapp979.pdf
CompactFlash SysACE_CompactFlash opb_sysace.pdf
USB Cypress_USB xapp925.pdf
DDR SDRAM DDR_SDRAM_64Mx32 DDR/DDR2 SDRAM
Ethernet MACEthernet_MAC
ug074.pdf
SRAMSRAM_256Kx32
Memory corner
Flash memoryFLASH_2Mx32






When we click the Generate button, we will start the generation of our embedded system.




We have now put together our embedded system. We can always go back and add or remove IO interfaces at a later stage. Here is the file tree generated from XPS.



  • blkdiagram - contains the blockdiagram of our system that can be displayed in a web browser (ETC_system.html).
  • data - contains the UCF (user constraints file) for the target board
  • etc - contains system settings for JTAG configuration on the board that is used when downloading the bit file and the default parameters that are passed to the ISE tools
  • pcores - is empty right now, but is utilized for custom peripherals
  • TestApp_Memory - contains a user application in C code source, for testing the memory in the system

Look at project options

Select Project->Project Options to display the current project setup.



Generate a design report file


To generate a design report file select Project->Generate and view design report. The design report will be stored in the report directory and can be viewed in a web browser (ETC_system.html).


Now it's time to add our own IP block, the Embedded Test Controller (ETC). That is the subject of the next part.


Top  Next  Previous


Posted at 08:59 by svenand

ANIL
January 25, 2010   04:06 PM PST
 
I am very lucky to get this.
Can I get a complete flow of EDK and SDK for custom board(spartan 3 mini module).

If possible mail me to
anil.haladipur@gmail.com
Amit
March 5, 2009   08:56 AM PST
 
Thanks!!
will you please give me a steps what to do after clicking finish? as i am new to EDK.I am trying to run simple Test_mem_App.
anurag
July 1, 2008   10:07 PM PDT
 
thanx a lot.!
yash
March 12, 2008   08:46 AM PDT
 
u made my day mate!was like blind folded and left alone in a jungle b4 i found this!!!Thanks a ton
 

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