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Table of content

New Horizons
What's new
Starting a blog
Writing a blog
I got a job

SystemC
SystemC from scratch. Part 1
SystemC from scratch. Part 2
SystemC from scratch. Part 3

ASIC/FPGA Design
Table of content
Index
FPGA design from scratch. Part 1
FPGA design from scratch. Part 2
FPGA design from scratch. Part 3
FPGA design from scratch. Part 4
FPGA design from scratch. Part 5
FPGA design from scratch. Part 6
FPGA design from scratch. Part 7
FPGA design from scratch. Part 8
FPGA design from scratch. Part 9
FPGA design from scratch. Part 10
FPGA design from scratch. Part 11
FPGA design from scratch. Part 12
FPGA design from scratch. Part 13
FPGA design from scratch. Part 14
FPGA design from scratch. Part 15
FPGA design from scratch. Part 16
FPGA design from scratch. Part 17
FPGA design from scratch. Part 18
FPGA design from scratch. Part 19
FPGA design from scratch. Part 20
FPGA design from scratch. Part 21
FPGA design from scratch. Part 22
FPGA design from scratch. Part 23
FPGA design from scratch. Part 24
FPGA design from scratch. Part 25
FPGA design from scratch. Part 26
FPGA design from scratch. Part 27
FPGA design from scratch. Part 28
FPGA design from scratch. Part 29
FPGA design from scratch. Part 30
FPGA design from scratch. Part 31
FPGA design from scratch. Part 32
FPGA design from scratch. Part 33
FPGA design from scratch. Part 34
FPGA design from scratch. Part 35
FPGA design from scratch. Part 36
FPGA design from scratch. Part 37
FPGA design from scratch. Part 38
FPGA design from scratch. Part 39
FPGA design from scratch. Part 40
FPGA design from scratch. Part 41
FPGA design from scratch. Part 42
FPGA design from scratch. Part 43
FPGA design from scratch. Part 44
FPGA design from scratch. Part 45
FPGA design from scratch. Part 46
FPGA design from scratch. Part 47
FPGA design from scratch. Part 48
FPGA design from scratch. Part 49
FPGA design from scratch. Part 50
Links
Acronyms and abbreviations
XCell Journals
CAD
A hardware designer's best friend
Zoo Design Platform
Linux
Installing Ubuntu Linux on a MacBook
Customizing Ubuntu Linux 1
Customizing Ubuntu Linux 2
Upgrading to Ubuntu 7.04
Install Ubuntu 7.04 with VMware
Making the virtual machine run faster
Ubuntu Links
A processor benchmark
Mac
Porting a Unix program to Mac OS X
Fixing a HyperTerminal in Mac OS X
A dream come true
Wireless freedom
Running
The New York City Marathon
Skiing/Skating
Kittelfjäll Lappland
Tour skating in Sweden and around the world
Top
Introduction
SSSK
Wild skating
Tour day
Safety equipment
A look at the equipment you need
Skate maintenance
Calendar
Links
Books, photos, films and videos
Weather forecasts
Travel
38000 feet above see level
A trip to Spain
Florida the sunshine state


Example Files
Verilog Testbench Body
Verilog Testcase
Verilog Setup
Simulation Result File
Simulation Report File




Photo Albums
Seaside Florida
Ronda Spain
Sevilla Spain
Cordoba Spain
Alhambra Spain
Kittelfjäll Lapland
Landsort Art Walk
Skating on thin ice


Favorites
Adventures in ASIC
ChipHit
Computer History Museum
Community of Sweden
DeepChip
Design & Reuse
Dilbert
EDA Cafe
EDA DesignLine
Embedded.com
EmbeddedRelated.com
FPGA Arcade
FPGA Blog
FPGA Central
FPGA Journal
FPGA World
MacApper
Mac geekery
Mac 2 Ubuntu
Get Perpendicular
Programmable Logic DesignLine
History of Linux
OpenCores
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Simplehelp
SOCcentral
World of ASIC



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Mar 26, 2007
FPGA design from scratch. Part 14
Putting it all together

Here is a simple overview of the simulation setup we are going to use when verifying the operation of the full system.




Memory Architecture

MicroBlaze is implemented with a Harvard memory architecture, i.e. instruction and data accesses are done in separate address spaces. Each address space has a 32 bit range (i.e. handles up to 4 gigabytes of instructions and data memory respectively). The instruction and data memory ranges can be made to overlap by mapping them both to the same physical memory. The latter is useful for software debugging. Both instruction and data interfaces of MicroBlaze are 32 bit wide and use big endian, bit-reversed format. MicroBlaze supports word, halfword, and byte accesses to data memory.

MicroBlaze does not separate data accesses to I/O and memory (i.e. it uses memory mapped I/O). The processor has up to three interfaces for memory accesses: Local Memory Bus (LMB), On-Chip Peripheral Bus (OPB), and Xilinx CacheLink (XCL). The LMB memory address range must not overlap with OPB or XCL ranges.

In our simulation setup we will use two memory modules, one for storing the control program (instruction memory) and one for storing data (ETC test program and test result). The Embedded Test Controller will be connected to the DOPB bus using a reserved address space.

We need help

We have to figure out how to connect everything and we need help. We will take a look at the Xilinix
tutorial web page to see if we can find some help there. EDK 9.1 MicroBlaze Tutorial Virtex-4 seems like a good start. This tutorial demonstrates the process of creating and testing a MicroBlaze system design using the Embedded Development Kit (EDK). The tutorial contains these sections:
  • System Requirements
  • MicroBlaze System Description
  • Tutorial Steps
The tutorial illustrates an Windows XP setup but we will use Ubuntu Linux.

Xilinx Platform Studio

The Xilinx Platform Studio (XPS) integrated development environment contains a wide variety of embedded tools, IP, libraries, wizards, and design generators to quickly facilitate the creation of a custom embedded platform. Sounds good, let's try it.

==> xps
$XILINX does not point to an iSE 8.1 installation

Press enter to close.

Software upgrade

Here is the answer to the question I asked in part 1. It is not possible to run different versions of ISE and EDK. After talking to Xilinx I decided to upgrade to ISE WebPACK 9.1i. Now we will find out how easy an upgrade is. First we will visit the 
Xilinx Download Center to download ISE WebPACK 9.1i. You will be asked for a Product ID and you must use the one specified. I was confused and changed it to the Product ID for my old ISE 8.1i WebPACK DVD and I was not able to download anything. To download ISE WebPACK 9.1i follow the instructions here. When I started the installation I got the following error message: Archive could not be located

Here is the answer from Xilinx's
Answer Database #23669:

This message is normally seen when WebInstall cannot connect to the Xilinx Web site. Please verify that your proxy settings are correct. If you have chosen to use IE proxy settings on Windows, try setting the proxy address and port manually in the WebInstaller instead.
Additionally, you can work around the issue by:
- Downloading the Single File Download version of WebPACK.
or
- Ordering a WebPACK DVD for a nominal fee.

It was not as easy as we thought. Let's try the single file download instead (1.4GB). Two hours later the file WebPACK_SFD_91i.zip is downloaded.
  1. Create a temporary directory: mkdir temp
  2. cd temp
  3. unzip WebPACK_SFD_91i.zip
  4. Become root : sudo -i
  5. ./setup to start installation



We will install ISE 9.1i in a new directory (xilinx91i) and leave the old ISE 8.2 installation until we know that the new one works.



When the installation has finished we can remove the temp directory and the WebPACK_SFD_91.i.zip file. Before we when can start ISE 9.1 we have to change to the new setting.sh file in our .bashrc startup script. Now we are ready to start ISE.

==> cd /home/svenand/root/projects/ETC
==> ise &



There is no turning back. Let's click the yes button.

Downloading the latest Service Pack.

When we thought we were finished it is time to download the latest Service Pack. We have to visit the Xilinx
Download Center again and download the file 9_1_03i_lin.zip (468MB).

One hour later the file 9_1_03i_lin.zip is downloaded.
  1. Create a temporary directory: mkdir temp
  2. cd temp
  3. unzip 9_1_03i_lin.zip
  4. Become root : sudo -i
  5. ./setup to start installation of Service Pack 3



The installation takes time. Be patient.




When the installation is finished we start ISE and see the following startup window. We have the latest version of ISE installed. It took us half a day to fix.




Upgrading from EDK 8.1 to EDK 9.1i

Here is the last part of our upgrading odyssey. Let's first find out
what's new in EDK 9.1i. It looks like a lot of good stuff, especially the new version (v6.0) of MicroBlaze is interesting to us. The only problem is that I can't find a place to download EDK v9.1i. I have looked all over Xilinx's web page but nowhere I can find a download page for EDK 9.1i. Read more.

When I can't find EDK 9.1i I will try to download EDK 8.2 instead. When I click the EDK 8.2 download link I am transfered to the
Electronic Fulfillment page. Here is what the electronic fulfillment is all about:

Electronic Fulfillment is an online software delivery service provided by Xilinx to in-maintenance ISE™ and EDK design tool customers. Xilinx Electronic Fulfillment provides you with:
  • Email notifications and online access to software.
  • Personalized download site for in-warranty customers.
  • 24x7 access with four secure file transfer options.
  • Immediate access to your software and registration ID.

Electronic Fulfillment is a service provided to in-maintenance customers only; new customers are not eligible. Electronic Fulfillment does not replace regular product update shipments, which will still be mailed to all in-warranty customers. When I proceed to the Electronic Fulfillment Download Center I get the following message:

We encountered a problem with your request. Our system records indicate you are not entitled to access the Xilinx Download at this time.

This is a case for Xilinx WebCase. Before we can start using WebCase we have to register and get an approval from Xilinx. One working day later I get an email telling me I can start using WebCase. Here are the questions I am going to send to Xilinx:

1. I bought a PowerPC and MicroBlaze development kit DO-ML403-EDK-ISE-USB-EC from Avnet including the software ISE WebPACK and EDK 8.1. Shouldn't I be entitled to a one year in-maintenance for this product.

2. Are all software updates distributed on DVD. Why haven't I received the EDK 8.2 DVD.

3. When will EDK 9.1i be available from the download center.

4. How can I extend the in-maintenance period after one year.

I am sitting here waiting for an answer. I can't continue my design. I can't use IES 9.1 together with EDK 8.1 and I can't download a newer version of EDK. I am stuck.

All of a sudden (on Good Friday) I received the following email from Xilinx:

Dear Valued Customer,

Thank you for choosing the Xilinx Embedded Development Kit (EDK) as your embedded hardware and software development solution for Virtex(tm)-5, Virtex-4, Virtex-II Pro and Spartan(tm) Series PowerPC(tm) and MicroBlaze(tm) processing systems. Your Xilinx EDK 9.1i software is now available for download!*

The Xilinx EDK software is built from much the same core technology as the industry's favorite FPGA design environment, Xilinx ISE(tm). The graphical user interface for EDK, DesignVision Award winning Xilinx Platform Studio(tm)(XPS), is the technology that integrates all the processes from design entry to debug and verification, helping you quickly get started with your embedded designs.

Please be aware that EDK 9.1i requires a valid installation of ISE 9.1i, including ISE Service Pack 1, to function properly.

You can navigate to your XEF site through the Software Download Center at the following link:

http://www.xilinx.com/xlnx/xil_sw_updates_home.jsp

Thanks Shelly. Here we go again! Let's start the download. This time nothing stops us.




We will download EDK 9.1i



One hour later the file EDK91.zip is downloaded.
  1. Create a temporary directory: mkdir temp
  2. cd temp
  3. unzip EDK91.zip
  4. Become root : sudo -i
  5. cd /home/svenand/temp/EDK
  6. ./setup to start installation of the Linux version of EDK 9.1i
  7. When finished source the file install_dir/setting.sh
After installing new software versions of ISE and EDK we have to compile all simulation libraries again. See part 13 Compiling everything for instructions.

We are now ready to start using EDK 9.1i and the Xilinx Platform Studio. Read part 15 to find out more.

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Posted at 09:49 am by svenand

 

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