New Horizons






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Table of content

New Horizons
What's new
Starting a blog
Writing a blog
I got a job

SystemC
SystemC from scratch. Part 1
SystemC from scratch. Part 2
SystemC from scratch. Part 3

ASIC/FPGA Design
Table of content
Index
FPGA design from scratch. Part 1
FPGA design from scratch. Part 2
FPGA design from scratch. Part 3
FPGA design from scratch. Part 4
FPGA design from scratch. Part 5
FPGA design from scratch. Part 6
FPGA design from scratch. Part 7
FPGA design from scratch. Part 8
FPGA design from scratch. Part 9
FPGA design from scratch. Part 10
FPGA design from scratch. Part 11
FPGA design from scratch. Part 12
FPGA design from scratch. Part 13
FPGA design from scratch. Part 14
FPGA design from scratch. Part 15
FPGA design from scratch. Part 16
FPGA design from scratch. Part 17
FPGA design from scratch. Part 18
FPGA design from scratch. Part 19
FPGA design from scratch. Part 20
FPGA design from scratch. Part 21
FPGA design from scratch. Part 22
FPGA design from scratch. Part 23
FPGA design from scratch. Part 24
FPGA design from scratch. Part 25
FPGA design from scratch. Part 26
FPGA design from scratch. Part 27
FPGA design from scratch. Part 28
FPGA design from scratch. Part 29
FPGA design from scratch. Part 30
FPGA design from scratch. Part 31
FPGA design from scratch. Part 32
FPGA design from scratch. Part 33
FPGA design from scratch. Part 34
FPGA design from scratch. Part 35
FPGA design from scratch. Part 36
FPGA design from scratch. Part 37
FPGA design from scratch. Part 38
FPGA design from scratch. Part 39
FPGA design from scratch. Part 40
FPGA design from scratch. Part 41
FPGA design from scratch. Part 42
FPGA design from scratch. Part 43
FPGA design from scratch. Part 44
FPGA design from scratch. Part 45
FPGA design from scratch. Part 46
FPGA design from scratch. Part 47
FPGA design from scratch. Part 48
FPGA design from scratch. Part 49
FPGA design from scratch. Part 50
Links
Acronyms and abbreviations
XCell Journals
CAD
A hardware designer's best friend
Zoo Design Platform
Linux
Installing Ubuntu Linux on a MacBook
Customizing Ubuntu Linux 1
Customizing Ubuntu Linux 2
Upgrading to Ubuntu 7.04
Install Ubuntu 7.04 with VMware
Making the virtual machine run faster
Ubuntu Links
A processor benchmark
Mac
Porting a Unix program to Mac OS X
Fixing a HyperTerminal in Mac OS X
A dream come true
Wireless freedom
Running
The New York City Marathon
Skiing/Skating
Kittelfjäll Lappland
Tour skating in Sweden and around the world
Top
Introduction
SSSK
Wild skating
Tour day
Safety equipment
A look at the equipment you need
Skate maintenance
Calendar
Links
Books, photos, films and videos
Weather forecasts
Travel
38000 feet above see level
A trip to Spain
Florida the sunshine state


Example Files
Verilog Testbench Body
Verilog Testcase
Verilog Setup
Simulation Result File
Simulation Report File




Photo Albums
Seaside Florida
Ronda Spain
Sevilla Spain
Cordoba Spain
Alhambra Spain
Kittelfjäll Lapland
Landsort Art Walk
Skating on thin ice


Favorites
Adventures in ASIC
ChipHit
Computer History Museum
Community of Sweden
DeepChip
Design & Reuse
Dilbert
EDA Cafe
EDA DesignLine
Embedded.com
EmbeddedRelated.com
FPGA Arcade
FPGA Blog
FPGA Central
FPGA Journal
FPGA World
MacApper
Mac geekery
Mac 2 Ubuntu
Get Perpendicular
Programmable Logic DesignLine
History of Linux
OpenCores
ORSoC
Simplehelp
SOCcentral
World of ASIC



New York City Marathon




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Dec 11, 2006
FPGA design from scratch. Part 9
When we have a stable design it is time to start the regression testing. We have to put together a test suite containing all the testcases we would like to use for our functional simulation. When we run all these testcases we will produce a lot of test result log files. We need a system to handle the whole regression testing and the Mongoose Simulation Environment can help you.

Regression Testing in Mongoose

Mongoose uses test sequences written in the Mongoose
Script Language (MSL) to perform regression testing. A  test sequence is a collection of testcases that are executed in sequence. You can control when to start a new testcase and where to send it. It can run as a background job on your own host or it can be sent to a batch queue manager (LSF) and  run on a dedicated simulation host.
This flow diagram shows the process of generating a test sequence, running a test sequence, analyzing the result and display the result in a web browser and/or send an email or
SMS with a summary of all test results.



Here is an example of a test sequence file. You can mix unix commands and Mongoose script commands. Lines starting with UC: are a unix commands and lines starting with MC: are Mongoose commands. You can write this file by hand or you can use the Test Sequence Generator to automatically generate one from the testcases you selected.


//$$HEADER
/*************************************************************************/
// Module:        ETC_TEST
// Design:        ETC
// Written by:    Sven-Ake Andersson ZooCad Consulting
// Description:   Test sequence file used for regression runs 
/*************************************************************************/

UC:echo 'Start test sequence'
MC:DisplayTime
MC:ClearAllCounters
MC:ClearFileNameAddOns
MC:AddTestCountToFileName
MC:AddTagNameToFileName
MC:SaveTickerInfo
MC:StartTicker
MC:SetTestCounter 1
MC:SetTagName ETC
MC:SetReportFormatShort
MC:SelectLogFile On
MC:SetReleaseName today
// Start of test sequence
UC:echo 'Testcase running : AllInstructionsExternalExcl.tc'
1:AllInstructionsExternalExcl.tc
MC:WaitSeconds 20
MC:WaitForSimulationToFinish 100
UC:echo 'Testcase running : BypassExternalExcl.tc'
1:BypassExternalExcl.tc
MC:WaitSeconds 20
MC:WaitForSimulationToFinish 100
// Add more testcases here
// ..................
MC:GenerateErrorReport
MC:DisplayHtmlFile
// Stop routine

UC:echo 'End of test sequence'
MC:SendErrorCount
MC:SendSMS 0706420380
MC:SendEmail zoodesign@comhem.se
MC:DisplayTime
MC:EndOfTestSequence


This is the email and SMS message sender window.



After running our testcases we have all
simulation log files saved in the result/printout directory:



Let's use the Log File Analyzer/Test Report Generator to generate a condensed test report file.



The Test Report Generator will search all log files for important information and put it into the
report file. The two errors reported are from testcases testing a function not implemented and can be ignored. We are finally ready for implementing the design into the FPGA.

Here is the email sent from the Mongoose script:




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Posted at 03:02 pm by svenand

 

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