New Horizons






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Table of content

New Horizons
What's new
Starting a blog
Writing a blog
I got a job

SystemC
SystemC from scratch. Part 1
SystemC from scratch. Part 2
SystemC from scratch. Part 3

ASIC/FPGA Design
Table of content
Index
FPGA design from scratch. Part 1
FPGA design from scratch. Part 2
FPGA design from scratch. Part 3
FPGA design from scratch. Part 4
FPGA design from scratch. Part 5
FPGA design from scratch. Part 6
FPGA design from scratch. Part 7
FPGA design from scratch. Part 8
FPGA design from scratch. Part 9
FPGA design from scratch. Part 10
FPGA design from scratch. Part 11
FPGA design from scratch. Part 12
FPGA design from scratch. Part 13
FPGA design from scratch. Part 14
FPGA design from scratch. Part 15
FPGA design from scratch. Part 16
FPGA design from scratch. Part 17
FPGA design from scratch. Part 18
FPGA design from scratch. Part 19
FPGA design from scratch. Part 20
FPGA design from scratch. Part 21
FPGA design from scratch. Part 22
FPGA design from scratch. Part 23
FPGA design from scratch. Part 24
FPGA design from scratch. Part 25
FPGA design from scratch. Part 26
FPGA design from scratch. Part 27
FPGA design from scratch. Part 28
FPGA design from scratch. Part 29
FPGA design from scratch. Part 30
FPGA design from scratch. Part 31
FPGA design from scratch. Part 32
FPGA design from scratch. Part 33
FPGA design from scratch. Part 34
FPGA design from scratch. Part 35
FPGA design from scratch. Part 36
FPGA design from scratch. Part 37
FPGA design from scratch. Part 38
FPGA design from scratch. Part 39
FPGA design from scratch. Part 40
FPGA design from scratch. Part 41
FPGA design from scratch. Part 42
FPGA design from scratch. Part 43
FPGA design from scratch. Part 44
FPGA design from scratch. Part 45
FPGA design from scratch. Part 46
FPGA design from scratch. Part 47
FPGA design from scratch. Part 48
FPGA design from scratch. Part 49
FPGA design from scratch. Part 50
Links
Acronyms and abbreviations
XCell Journals
CAD
A hardware designer's best friend
Zoo Design Platform
Linux
Installing Ubuntu Linux on a MacBook
Customizing Ubuntu Linux 1
Customizing Ubuntu Linux 2
Upgrading to Ubuntu 7.04
Install Ubuntu 7.04 with VMware
Making the virtual machine run faster
Ubuntu Links
A processor benchmark
Mac
Porting a Unix program to Mac OS X
Fixing a HyperTerminal in Mac OS X
A dream come true
Wireless freedom
Running
The New York City Marathon
Skiing/Skating
Kittelfjäll Lappland
Tour skating in Sweden and around the world
Top
Introduction
SSSK
Wild skating
Tour day
Safety equipment
A look at the equipment you need
Skate maintenance
Calendar
Links
Books, photos, films and videos
Weather forecasts
Travel
38000 feet above see level
A trip to Spain
Florida the sunshine state


Example Files
Verilog Testbench Body
Verilog Testcase
Verilog Setup
Simulation Result File
Simulation Report File




Photo Albums
Seaside Florida
Ronda Spain
Sevilla Spain
Cordoba Spain
Alhambra Spain
Kittelfjäll Lapland
Landsort Art Walk
Skating on thin ice


Favorites
Adventures in ASIC
ChipHit
Computer History Museum
Community of Sweden
DeepChip
Design & Reuse
Dilbert
EDA Cafe
EDA DesignLine
Embedded.com
EmbeddedRelated.com
FPGA Arcade
FPGA Blog
FPGA Central
FPGA Journal
FPGA World
MacApper
Mac geekery
Mac 2 Ubuntu
Get Perpendicular
Programmable Logic DesignLine
History of Linux
OpenCores
ORSoC
Simplehelp
SOCcentral
World of ASIC



New York City Marathon




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Jul 7, 2009
Zoo Design Platform
It all started back in 1992. My design group at Ericsson was designing a multiprocessor board using Motorola 88000 microprocessors. We needed some fast glue-logic and decided to use Motorola H4C ASICs (0.7um CMOS) to design this logic. I was responsible for the testlogic design, including the tap controller and the boundary scan implementation and was going to use the Verilog hardware description language (HDL) for the first time. I had been to a Verilog training course and I had learned how to use Verilog-XL. Most of time I was debugging my design blocks using Verilog-XL in interactive mode. All the commands had to be written and executed from the command line. Moving up and down the design hierarchy involved many $scopes and $showscopes commands. To save time and typing I decided to create a graphical user interface (GUI) and put all these commands behind buttons and menus.

At that time all our computer work was done on SUN
SPARC machines with the  SUN OS 4 operating system. SUN Microsystems was using OPEN LOOK user interface with the XView toolkit and had a graphical interface builder called Devguide. I started to use this tool and could easily design very nice graphical interfaces. At the same time I learned how to program in "C" and then everything fell into place. My first tool was called VeriSmart.

VeriSmart Simulation Workbench






MultiSmart Cosimulation Workbench

One year later we needed support for co-simulation, running up to six simulations at the same time. The communication between the simulations was done using file semaphores. To support this simulation setup I developed MultiSmart.



Cobra Command Center

Back in those old days the only terminal emulator window you had access to was
cmdtool or shelltool. I guess xterm was around but I hadn't  heard about it. cmdtool and shelltool did not offer anything more than a window to type commands in. The only difference between the two was that cmdtool had a scrolling window. I decided to build my own terminal emulator, Cobra Command Center. I started with a plain cmdtool window and began adding new features.

1. A file tree browser.



2. A menu to support a number of file operations in the file tree.



3. A file list browser.




When there are too many files in a directory a file list browser makes more sense. It also has a filter function that lets you filter out only the files you are interesting in.

4. A command list manager.



The command list manager lets you store all your "always forgot" commands. To execute a command double-click it.

5. Bookmarks



The Bookmark Definition window lets you bookmark any directory, source file, executable file, script file, FrameMaker file and PDF file. When selecting a bookmarked file the appropriate action will be taken. For a directory a cd <bookmark> will be executed.

This is what came out of the remodeling process.



Still today I am using Cobra Command Center for 95% of all the terminal work I do, but now the Linux version.

Mongoose Simulation Environment

During my 15 years as an ASIC designer I was involved in more than 25 ASIC design projects. Every time I had to start from scratch to build a new simulation environment. That struggle gave me the idea to start working on the
Mongoose Simulation Environment.



Why using the Mongoose Simulation Environment:
  • Save time. Faster setup time. Easier to find files.
  • A common interface to all simulators (ModelSim, NCSIM, VCS)
  • Full support for both interactive and batch simulations
  • Seamless integration of Specman
  • Clearcase support for revision control
  • LSF batch queue handling
Read more about using Mongoose in the FPGA design from scratch story.

Zebra Verilog Design Explorer

When designing an ASIC using Verilog HDL you will end up with a huge number of Verilog source files stored in many different directories. When debugging the design you need fast access to all these files to make changes and rerun your simulations.
Zebra Verilog Design Explorer will make that process a very fast and efficient one. Just open the Design Tree Browser and display the part of the design tree you are interested in. Than simply mark the module you would like to change and load it to the text editor window.




The Zebra Design Tree Browser.





Topi - Top Code Generator

Ever heard of table driven design. That is exactly what
Topi is all about. When designing an ASIC with more than 1000 signal pins you need an exact and precise way of adding all the signal names. Topi will help you generate the top testbench, the top instantiation and the ASIC pinlayout in the same tool.




Topi Pin Table Editor



Topi Pin Layout Editor




Porting Unix programs to Linux

Today it is hard to find a SUN SPARC workstation and most of the engineering work is done on Linux based computers or PC. Some years ago I decided to move my Zoo Design Platform to the Linux platform. This was a fairly simple process because all the xview libraries had been converted to Linux.

Porting a Unix program to Mac OS X

As a last step I ported one of the programs to Mac OS X. When Apple moved to Intel based computers it made things much easier. You can read more about this process
here.

Download programs

All the programs can be download from www.zoocad.com/zoodesign_download.html.

Summary

By now I think you understand why it is called
Zoo Design Platform. Here again are all the "animals" in the Zoo.

 Tool  Description  Introduced  Mac OS X
 Linux
VeriSmart Verilog Simulation Workbench
1992 No
Yes
MultiSmart Verilog Cosimulation Workbench
1993 No
Yes
Cobra Command Center (Smart Terminal)
1995 Yes Yes
Mongoose Simulation Environment
1993 No
Yes
Zebra Verilog Design Explorer
1994 No
Yes
Okapi
VHDL Design Explorer
1994
No
Yes
Topi
Top Code Builder
1995
No
Yes


Welcome to the Zoo!

Top

Posted at 01:18 pm by svenand

svenand
June 29, 2009   11:23 PM PDT
 
Here is the link to the download page:
http://www.zoocad.com/zoodesign_download.html
ravi
June 19, 2009   07:19 AM PDT
 
nice tool ....

tool download link please send me


ravikumar.prk12@yahoo.com
 

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