New Horizons









Welcome to my blog

My name is Sven Andersson and I
work as a consultant in embedded
system design, implemented in ASIC
and FPGA.
In my spare time I write this blog
and I hope it will inspire others to
learn more about this fantastic field.
I live in Stockholm Sweden and have
my own company

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and ask questions or make comments
about my blog.



Content

New Horizons
What's new
Starting a blog
Writing a blog
Using an RSS reader

Zynq Design From Scratch
Started February 2014
Introduction
Changes and updates
Zynq-7000 All Programmable SoC
ZedBoard and other boards
Computer platform and VirtualBox
Installing Ubuntu
Fixing Ubuntu
Installing Vivado
Starting Vivado
Using Vivado
Lab 1. Create a Zynq project
Lab 1. Build a hardware platform
Lab 1. Create a software application
Lab 1. Connect to ZedBoard
Lab 1. Run a software application
Lab 1. Benchmarking ARM Cortex-A9
Lab 2. Adding a GPIO peripheral
Lab 2. Create a custom HDL module
Lab 2. Connect package pins and implement
Lab 2. Create a software application and configure the PL
Lab 2. Debugging a software application
Running Linux from SD card
Installing PetaLinux
Booting PetaLinux
Connect to ZedBoad via ethernet
Rebuilding the PetaLinux kernel image
Running a DHCP server on the host
Running a TFTP server on the host
PetaLinux boot via U-boot
PetaLinux application development
Fixing the host computer
Running NFS servers
VirtualBox seamless mode
Mounting guest file system using sshfs
PetaLinux. Setting up a web server
PetaLinux. Using cgi scripts
PetaLinux. Web enabled application
Convert from VirtualBox to VMware
Running Linaro Ubuntu on ZedBoard
Running Android on ZedBoard
Lab2. Booting from SD card and SPI flash
Lab2. PetaLinux board bringup
Lab2. Writing userspace IO device driver
Lab2. Hardware debugging
MicroZed quick start
Installing Vivado 2014.1
Lab3. Adding push buttons to our Zynq system
Lab3. Adding an interrupt service routine
Installing Ubuntu 14.04
Installing Vivado and Petalinux 2014.2

Chipotle Verification System
Introduction

EE Times Retrospective Series
It all started more than 40 years ago
My first job as an electrical engineer
The Memory (R)evolution
The Microprocessor (R)evolution

Four soft-core processors
Started January 2012
Introduction
Table of contents
Leon3
MicroBlaze
OpenRISC 1200
Nios II

Using the Spartan-6 LX9 MicroBoard
Started August 2011
Introduction
Table of contents
Problems, fixes and solutions

FPGA Design From Scratch
Started December 2006
Introduction
Table of contents
Index
Acronyms and abbreviations

Actel FPGA design
Designing with an Actel FPGA. Part 1
Designing with an Actel FPGA. Part 2
Designing with an Actel FPGA. Part 3
Designing with an Actel FPGA. Part 4
Designing with an Actel FPGA. Part 5

CAD
A hardware designer's best friend
Zoo Design Platform

Linux
Installing Cobra Command Tool
A processor benchmark

Mac
Porting a Unix program to Mac OS X
Fixing a HyperTerminal in Mac OS X
A dream come true

Running
The New York City Marathon

Skiing/Skating
Kittelfjall Lappland

Tour skating in Sweden and around the world
Top
Introduction
SSSK
Wild skating
Tour day
Safety equipment
A look at the equipment you need
Skate maintenance
Links
Books, photos, films and videos
Weather forecasts

Travel
38000 feet above see level
A trip to Spain
Florida the sunshine state

Photo Albums
Seaside Florida
Ronda Spain
Sevilla Spain
Cordoba Spain
Alhambra Spain
KittelfjÀll Lapland
Landsort Art Walk
Skating on thin ice

Books
100 Power Tips for FPGA Designers

Favorites
Adventures in ASIC
ChipHit
Computer History Museum
DeepChip
Design & Reuse
Dilbert
d9 Tech Blog
EDA Cafe
EDA DesignLine
Eli's tech Blog
Embedded.com
EmbeddedRelated.com
FPGA Arcade
FPGA Blog
FPGA Central
FPGA CPU News
FPGA developer
FPGA Journal
FPGA World
Lesley Shannon Courses
Mac 2 Ubuntu
Programmable Logic DesignLine
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Simplehelp
SOCcentral
World of ASIC



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Sunday, March 16, 2014
Zynq design from scratch. Part 25.
Rebuilding the PetaLinux reference design

So far, we have tested the PetaLinux reference design pre-built software image both with QEMU and on hardware. We can also rebuild the reference design. The following blog entry describe how to do it and how to test the resulting image.

Setting up the transfer directory

We will create a directory called /tftpboot and allow everyone full access. The result from the PetaLinux build will be copied to this directory.

-> sudo mkdir /tftpboot
-> sudo chmod -R 777 /tftpboot
-> sudo chown -R nobody /tftpboot

Compiling the PetaLinux design software

Run petalinux-build command to compile the software image.

-> cd <Project Dir>/
Avnet-Digilent-ZedBoard-2013.3
-> source /opt/PetaLinux/
petalinux-v2013.10-final/settings.sh
-> petalinux-build






This will take a few minutes.





The final kernel image is the "zImage" for Zynq. The result from the compilation will be stored in two places.

1. In the /tftpboot directory





2. In the project directory





Test new software with QEMU

We use the command:

-> petalinux-boot --qemu --kernel

to boot the image file zImage.





PetaLinux running in QEMU.





To terminate QEMU type ctrl-a and then x


Test the new software on hardware

1. Use petalinux-boot to program the FPGA with the reference design pre-built bitstream.

-> petalinux-boot --jtag --prebuilt 1

2. Use petalinux-boot to download the built Linux image to the board and boot it.

-> petalinux-boot --jtag --kernel





We got an error. Unable to download the image. Doesn't say much. Anyone has an answer? Let's try another solution.

Make a prebuilt package

We will use the command petalinux-package to packages all files into a prebuilt package and then use the command: petalinix-boot --jtag --prebuilt 3 to boot the ZedBoard. Before we can do that we have to make some preparations.





1. Copy the file bitstream file to the working directory:

-> cp pre-built/linux/implementation/download.bit .

2. Copy the first stage boot loader file to the images/linux directory:

-> cp pre-built/linux/images/zynq_fsbl.elf images/linux/.

3. Rename the prebuilt directory (just in case)

-> mv pre-built pre-built.orig

Generate the prebuilt package

We are now ready to generate the package:

->petalinux-package --prebuilt --fpga download.bit

Reset the ZedBoard

Before we can configure the board again we must reset the board. The reset button on the board will not perform a complete reset. The only solution I have found is to power off the ZedBoard. Anyone has a better solution?


Load and boot PetaLinux

->petalinux-boot --jtag --prebuilt 3





This time it works.


Top   Previous   Next


Posted at 15:33 by svenand

Murad
July 13, 2014   07:05 PM PDT
 
I am using Ubuntu 14.04 LTS, PetaLinux 2014.2, 64-bit machine.
I am getting the following error trying to execute:
petalinux-build

[ERROR] E: Sub-process /opt/PetaLinux/petalinux-v2014.2-final/tools/packagemanager/bin/dpkg returned an error code (127)
[ERROR] make[2]: *** [.pkg_stagefs] Error 255
[ERROR] make[1]: *** [sub_build_component_/none/packages-repo/single/plnx-repo] Error 2
ERROR: Failed to build linux

Any idea please
Ivan
July 8, 2014   10:24 AM PDT
 
Regarding error after
-> petalinux-boot --jtag --kernel
I have the same error with zc706 board and its support package.
But if running with verbose flag:
-> petalinux-boot -v --jtag --kernel
I get a following error message:
XMD% XMD% Downloading Data File -- /opt/Xilinx/petalinux-v2014.2-final/Xilinx-ZC706-2014.2/images/linux/zImage at 0x00008000
Progress ..................ERROR:
Access aborted (DSCR=0x4b186043)
Error Address = 0x00030000, Size = 0x00000004


XMD% ERROR: Write value 0x00008000 to Register 15 failed

AP transaction timeout: ACK = 0x01, expected=0x02)
 

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