New Horizons









Welcome to my blog

My name is Sven Andersson and I
work as a consultant in embedded
system design, implemented in ASIC
and FPGA.
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Zynq Design From Scratch
Started February 2014
1 Introduction
Changes and updates
2 Zynq-7000 All Programmable SoC
3 ZedBoard and other boards
4 Computer platform and VirtualBox
5 Installing Ubuntu
6 Fixing Ubuntu
7 Installing Vivado
8 Starting Vivado
9 Using Vivado
10 Lab 1. Create a Zynq project
11 Lab 1. Build a hardware platform
12 Lab 1. Create a software application
13 Lab 1. Connect to ZedBoard
14 Lab 1. Run a software application
15 Lab 1. Benchmarking ARM Cortex-A9
16 Lab 2. Adding a GPIO peripheral
17 Lab 2. Create a custom HDL module
18 Lab 2. Connect package pins and implement
19 Lab 2. Create a software application and configure the PL
20 Lab 2. Debugging a software application
21 Running Linux from SD card
22 Installing PetaLinux
23 Booting PetaLinux
24 Connect to ZedBoad via ethernet
25 Rebuilding the PetaLinux kernel image
26 Running a DHCP server on the host
27 Running a TFTP server on the host
28 PetaLinux boot via U-boot
29 PetaLinux application development
30 Fixing the host computer
31 Running NFS servers
32 VirtualBox seamless mode
33 Mounting guest file system using sshfs
34 PetaLinux. Setting up a web server
35 PetaLinux. Using cgi scripts
36 PetaLinux. Web enabled application
37 Convert from VirtualBox to VMware
38 Running Linaro Ubuntu on ZedBoard
39 Running Android on ZedBoard
40 Lab2. Booting from SD card and SPI flash
41 Lab2. PetaLinux board bringup
42 Lab2. Writing userspace IO device driver
43 Lab2. Hardware debugging
44 MicroZed quick start
45 Installing Vivado 2014.1
46 Lab3. Adding push buttons to our Zynq system
47 Lab3. Adding an interrupt service routine
48 Installing Ubuntu 14.04
49 Installing Vivado and Petalinux 2014.2
50 Using Vivado 2014.2
51 Upgrading to Ubuntu 14.04
52 Using Petalinux 2014.2
53 Booting from SD card and SPI flash
54 Booting Petalinux 2014.2 from SD card
55 Booting Petalinux 2014.2 from SPI flash
56 Installing Vivado 2014.3

Chipotle Verification System
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EE Times Retrospective Series
It all started more than 40 years ago
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Four soft-core processors
Started January 2012
Introduction
Table of contents
Leon3
MicroBlaze
OpenRISC 1200
Nios II

Using the Spartan-6 LX9 MicroBoard
Started August 2011
Introduction
Table of contents
Problems, fixes and solutions

FPGA Design From Scratch
Started December 2006
Introduction
Table of contents
Index
Acronyms and abbreviations

Actel FPGA design
Designing with an Actel FPGA. Part 1
Designing with an Actel FPGA. Part 2
Designing with an Actel FPGA. Part 3
Designing with an Actel FPGA. Part 4
Designing with an Actel FPGA. Part 5

CAD
A hardware designer's best friend
Zoo Design Platform

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Installing Cobra Command Tool
A processor benchmark

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Porting a Unix program to Mac OS X
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Saturday, February 15, 2014
Zynq design from scratch. Part 11.
Build the hardware platform and export to SDK

A basic ARM hardware platform is now configured. The configuration includes clock and DDR controller settings. It also enabled and maps a UART peripheral. Now we will build the hardware platform and export to the Software Development Kit (SDK) so that an application can be developed.


1. Since we have added an IP in the design we need to generate the HDL files that are required for implementation, simulation and synthesis. In this first design we only use PS and there is nothing designed in the PL but we still need to do this step in order to hook up the design to the top level. Expand <Design Sources> in the Sources pane, right click system(system.bd) and select <Generate Output Products>. This window pops-up. Click Generate to start the generation.







2. Even though the whole design is made in IP integrator we still need a top level HDL in order to  identify the top of the design. The only thing needed is a top level HDL wrapper that instantiates the Block Design and it can be created automatically by right-clicking system(system.bd) and selecting <Create HDL Wrapper).

3. Click OK to let Vivado generate the system_wrapper.v top-level module for the design.






4.
Notice that the embedded system (system.bd) is now a sub-module of system_wrapper.





5. We now have a design that can be used to configure the ZedBoard. But first we have to export the design to Vivado SDK where we will write the c-program that will run in the ARM processing system. In Vivado menu select File->Export->Export Hardware for SDK...





6. The Vivado design tool exports the Hardware Platform Specification for our design (system.xml) to SDK. In addition to system.xml, there are four more files exported to SDK. They are ps7_init.c, ps7_init.h, ps7_init.tcl, and ps7_init.html. The system.xml file opens by default when SDK launches. The address map of our system read from this file is shown in the SDK window.

The ps7_init.c and ps7_init.h files contain the initialization code for the Zynq processing system and initialization settings for DDR, clocks, plls and MIOs. SDK uses these settings when initializing the processing system so that the applications can be run on top of the processing system.





Here are some of the files generated during the hardware design session. No it is time to start writing some software. We will start with the simplest program called "Hello World".




Top   Previous   Next



Posted at 09:41 by svenand

Rao
October 8, 2014   06:51 PM PDT
 
Hello

I am using VIVADO 2014.2. When I export and then launch sdk i get the following error:
ERROR: [Common 17-70] Application Exception: Not found in path: xsdk

Can you please help me with this.

Thank you
Petter
September 23, 2014   04:00 PM PDT
 
In 2014.2 the export hardware contains only export to. It does not start the SDK either. The SDK has to be launched manually by selecting File/Launch SDK.
Hanaa
August 11, 2014   07:01 PM PDT
 
Using Vivado 2014.2, There is no system.xml
They are ps7_init.c, ps7_init.h, ps7_init.tcl, ps7_init.html and system.hdf
The hierarchy is somehow differ. There us no LED_Controller.data branch and LED_Controller.cache is empty.
 

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