There are other players in the FPGA arena. Actel is one of them. They now belong to Microsemi, a company that has a wide range of products. See their web page for more information.
We will go directly to the FPGAs which takes us to the Actel webpage.
The product we are going to design has to fit in the Märklin Gauge Z train and has a very low power consumption. It will consist of an FPGA with analog sensors and a radio communication unit.
Z scale (1:220) is one of the smallest commercially available model railway scales with a track gauge of 6.5 mm/0.256 in. Z scale trains operate on 0-10 volts direct current (DC) and offer the same operating characteristics as all other two-rail, direct-current, analog model railways. Z scale locomotives can be retro-fitted with microprocessor based digital decoders for digitally controlled model railways. Model trains, track, structures, and human/animal figures are readily available in European, North American, and Japanese styles from a variety of manufacturers.
Selecting an FPGA
Choosing the right FPGA can be a tough decision to make. The deciding factors in our project are:
- Low power consumption
- Small physical size
- Nonvolatile programming
- Low operating voltage
- Low speed
It looks like a perfect fit for the Actel IGLOO FPGA family.
The IGLOO family
The Actel IGLOO series of low-power FPGAs includes IGLOO/e, IGLOO nano, and IGLOO PLUS devices—the industry's lowest-power FPGAs. IGLOO devices are reprogrammable, full-featured flash, low-power FPGAs designed to meet the demanding power and area requirements of today's portable and power-conscious electronics. Based on Actel nonvolatile flash technology and single-chip ProASIC®3/E FPGA architecture, the 1.2 V / 1.5 V operating voltage family offers the industry's lowest power consumption, smallest footprint, and competitive prices.
The smallest of them all is IGLOO nano.
We will use the IGLOO nano AGLN250 in 5x5 mm package which will hopefully fit in the Märklin train. The FPGA comes in a chip scale package not much larger than the chip itself.
Here is package data for the CS81 package.
Actel FPGA development software
Libero Integrated Design Environment is Actel's comprehensive software toolset for designing with all Actel FPGAs, including Actel's new SmartFusion family, the world's only FPGA with hard-wired ARM Cortex-M3 and programmable analog.
From design, synthesis and simulation, through floorplanning, place-and-route, timing constraints and analysis, power analysis, and program file generation, Libero IDE manages the entire design flow quickly and efficiently.
Installing Libero IDE software
Let's go to the download page and download the Linux version of the software.
Click the link Download Libero v9.1 SP3 for Linux.
We will start by downloading and installing Libero IDE v9.1 Software for Linux - Capture 184.108.40.206
It is almost 1GB of data. It will take some time. Why not have a cup of coffee while we are waiting. When the download has finished unzip the downloaded file and change the permissions to make it executable.
--> gunzip LiberoLU91_Lin.bin.gz
--> chmod 755 LiberoLU91_Lin.bin
Running the installer
Execute the following command to start the Libero IDE installer. Before starting we have to follow the installation instructions given in the page above.
--> sudo ./LiberoLU91_Lin.bin
Choose an installation directory.
Choose the install set.
Start the installation.
Here is the directory structure for the Libero IDE installation.
Installing a service pack
We are now ready to install the service pack SP3 on top of the normal installation.
Here are the installation instructions from the READMe file.
To install run : sudo ./wsupdate.sh
We have finished the Libero IDE installation. The next thing we have to do is obtain a license file from Actel and start a license server on our Linux host. See next part in this tutorial.
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