New Horizons







Welcome to my blog

My name is Sven Andersson and I
work as a consultant in embedded
system design, implemented in ASIC
and FPGA.
In my spare time I write this blog
and I hope it will inspire others to
learn more about this fantastic field.
I live in Stockholm Sweden and have
my own company

Contact

You are welcome to contact me
and ask questions or make comments
about my blog.

View Sven Andersson's profile on LinkedIn

Content

New Horizons
What's new
Starting a blog
Writing a blog
Using an RSS reader

Zynq Design From Scratch
www.zynqfromscratch.com
Started February 2014
Introduction
Changes and updates
Zynq-7000 All Programmable SoC
ZedBoard and other boards
Computer platform and VirtualBox
Installing Ubuntu
Fixing Ubuntu
Installing Vivado
Starting Vivado
Using Vivado
Lab 1. Create a Zynq project
Lab 1. Build a hardware platform
Lab 1. Create a software application
Lab 1. Connect to ZedBoard
Lab 1. Run a software application
Lab 1. Benchmarking ARM Cortex-A9
Lab 2. Adding a GPIO peripheral
Lab 2. Create a custom HDL module
Lab 2. Connect package pins and implement
Lab 2. Create a software application and configure the PL
Lab 2. Debugging a software application
Running Linux from SD card
Installing PetaLinux
Booting PetaLinux
Connect to ZedBoad via ethernet
Rebuilding the PetaLinux kernel image
Running a DHCP server on the host
Running a TFTP server on the host
PetaLinux boot via U-boot
PetaLinux application development
Fixing the host computer
Running NFS servers
VirtualBox seamless mode
Mounting guest file system using sshfs
PetaLinux. Setting up a web server
PetaLinux. Using cgi scripts
PetaLinux. Web enabled application
Convert from VirtualBox to VMware
Running Linaro Ubuntu on ZedBoard

Chipotle Verification System
Introduction

Four soft-core processors
Started January 2012

Xilinx FPGA Design
New start August 2011
Problems, fixes and solutions
FPGA design from scratch. Part 51
FPGA design from scratch. Part 52
FPGA design from scratch. Part 53
FPGA design from scratch. Part 54
FPGA design from scratch. Part 55
FPGA design from scratch. Part 56
FPGA design from scratch. Part 57
FPGA design from scratch. Part 58
FPGA design from scratch. Part 59
FPGA design from scratch. Part 60
Using the Spartan-6 LX9 MicroBoard
Table of contents
FPGA design from scratch. Part 61
FPGA design from scratch. Part 62
FPGA design from scratch. Part 63
FPGA design from scratch. Part 64
FPGA design from scratch. Part 65
FPGA design from scratch. Part 66
FPGA design from scratch. Part 67
FPGA design from scratch. Part 68
FPGA design from scratch. Part 69
FPGA design from scratch. Part 70
FPGA design from scratch. Part 71
FPGA design from scratch. Part 72
FPGA design from scratch. Part 73
FPGA design from scratch. Part 74
FPGA design from scratch. Part 75
FPGA design from scratch. Part 76
FPGA design from scratch. Part 77
FPGA design from scratch. Part 78
FPGA design from scratch. Part 79
FPGA design from scratch. Part 80
FPGA design from scratch. Part 81
FPGA design from scratch. Part 82
FPGA design from scratch. Part 83
FPGA design from scratch. Part 84
FPGA design from scratch. Part 85
FPGA design from scratch. Part 86
FPGA design from scratch. Part 87
FPGA design from scratch. Part 88
FPGA design from scratch. Part 89
FPGA design from scratch. Part 90
FPGA design from scratch. Part 91
Started December 2006
Table of contents
Index
FPGA design from scratch. Part 1
FPGA design from scratch. Part 2
FPGA design from scratch. Part 3
FPGA design from scratch. Part 4
FPGA design from scratch. Part 5
FPGA design from scratch. Part 6
FPGA design from scratch. Part 7
FPGA design from scratch. Part 8
FPGA design from scratch. Part 9
FPGA design from scratch. Part 10
FPGA design from scratch. Part 11
FPGA design from scratch. Part 12
FPGA design from scratch. Part 13
FPGA design from scratch. Part 14
FPGA design from scratch. Part 15
FPGA design from scratch. Part 16
FPGA design from scratch. Part 17
FPGA design from scratch. Part 18
FPGA design from scratch. Part 19
FPGA design from scratch. Part 20
FPGA design from scratch. Part 21
FPGA design from scratch. Part 22
FPGA design from scratch. Part 23
FPGA design from scratch. Part 24
FPGA design from scratch. Part 25
FPGA design from scratch. Part 26
FPGA design from scratch. Part 27
FPGA design from scratch. Part 28
FPGA design from scratch. Part 29
FPGA design from scratch. Part 30
FPGA design from scratch. Part 31
FPGA design from scratch. Part 32
FPGA design from scratch. Part 33
FPGA design from scratch. Part 34
FPGA design from scratch. Part 35
FPGA design from scratch. Part 36
FPGA design from scratch. Part 37
FPGA design from scratch. Part 38
FPGA design from scratch. Part 39
FPGA design from scratch. Part 40
FPGA design from scratch. Part 41
FPGA design from scratch. Part 42
FPGA design from scratch. Part 43
FPGA design from scratch. Part 44
FPGA design from scratch. Part 45
FPGA design from scratch. Part 46
FPGA design from scratch. Part 47
FPGA design from scratch. Part 48
FPGA design from scratch. Part 49
FPGA design from scratch. Part 50
Acronyms and abbreviations
Actel FPGA design
Designing with an Actel FPGA. Part 1
Designing with an Actel FPGA. Part 2
Designing with an Actel FPGA. Part 3
Designing with an Actel FPGA. Part 4
Designing with an Actel FPGA. Part 5
CAD
A hardware designer's best friend
Zoo Design Platform
Linux
Installing Cobra Command Tool
A processor benchmark
Mac
Porting a Unix program to Mac OS X
Fixing a HyperTerminal in Mac OS X
A dream come true
Running
The New York City Marathon
Skiing/Skating
Kittelfjäll Lappland
Tour skating in Sweden and around the world
Top
Introduction
SSSK
Wild skating
Tour day
Safety equipment
A look at the equipment you need
Skate maintenance
Calendar
Links
Books, photos, films and videos
Weather forecasts

Travel
38000 feet above see level
A trip to Spain
Florida the sunshine state

Photo Albums
Seaside Florida
Ronda Spain
Sevilla Spain
Cordoba Spain
Alhambra Spain
Kittelfjäll Lapland
Landsort Art Walk
Skating on thin ice

Books
100 Power Tips for FPGA Designers

Favorites
Adventures in ASIC
ChipHit
Computer History Museum
DeepChip
Design & Reuse
Dilbert
d9 Tech Blog
EDA Cafe
EDA DesignLine
Eli's tech Blog
Embedded.com
EmbeddedRelated.com
FPGA Arcade
FPGA Blog
FPGA Central
FPGA CPU News
FPGA developer
FPGA Journal
FPGA World
Lesley Shannon Courses
Mac 2 Ubuntu
Programmable Logic DesignLine
OpenCores
Simplehelp
SOCcentral
World of ASIC



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Saturday, August 20, 2011
Xilinx Spartan-6 LX9 MicroBoard Tutorial
Table of contents

Part 61

Looking for a new development board
Introduction to the Avnet Spartan-6 LX9 MicroBoard
The development kit
Avnet Design Resource Center
Connecting the board to a host computer
Downloading and installing Xilinx Design Suite 13.2

Part 62

Connecting a terminal
Embedded demonstration project
GPIO test

Part 63

Configuring the FPGA
The integrated solution
Installing Diligent software drivers
iMPACT FPGA configuration tool

Part 64

Installing a board support package
Finding XBD files

Part 65

Putting together an embedded system
Xilinx Platform Studio XPS
Getting help
EDK reference manual
Starting XPS
Addng and removing peripherals
Generate a block diagram
Generate a design report
The system file tree
Synthesise the design
Generate the bitstream

Part 66

Using the Software Developmnet Kit SDK
Getting help
Starting a new C-project
Generate a linker script
Program the FPGA
Setting up a run configuration
Run the program

Part 67

Adding an EDK IP to an embedded system
Skipping ISE
Finding and adding the IP
Generate addresses
GPIO interface
Connecting ports
Modifying the UCF file
Generate new netlist and bitstream

Part 68

Writing code for the new peripheral
Create a new application
Adding a source file
Writing the C code
Generate a linker script
Test the new system with the new application


Part 69

Adding a custom IP to an embedded system
Create a new peripheral
Files generated
Customize the new peripheral
Adding user code
Adding new ports to the mpd file
Adding the custom IP to the system
Export to SDK

Part 70

Embedded system simulation
Behavioral simulation
Setting up the simulation environment
Adding a test bench
Select an ELF file
Generate behavioral simulation models
Modify the test bench file
Running a simulation
Changing the time precision
Looking at MicroBlaze program execution

Part 71

Embedded ChipScope Debugging
ChipScope Pro tool overview
Adding the ChipScope AXI monitor core
Making the design smaller
Analyzing the design with ChipScope
Connecting ChipScope to target
Adding AXI signal names
Capture waveform data

Part 72

Running Linux on the LX9 MicroBoard
Choosing PetaLinux
Building the hardware platform
Configuring the MicroBlaze soft processor
Configuring the debug module
Synthesis the design
Place and route the design

Part 73

Installing PetaLinux SDK
Downloading the software
Extract the PetaLinux package
Install the license file
Setup PetaLinux working environment
PetaLinux BSP installation process

Getting started with PetaLinux SDK

Part 74

Networking configuration procedures
Setup a TFTP server
Installing the TFTP server
Setting up the transfer directory
Setting up the configuration file
Starting the TFTP server
Setup a NFS server
Starting NFS and Portmap services
Mounting the shared directory
Using the TFTP server
Telnet on the board
Using FTP


Part 75

Board bring up with PetaLinux SDK
Building the hardware platform
Configuring software settings
Add PetaLinux repository
First stage boot loader
Adding FS-boot
Universal boot loader
Configure fs-boot settings
How to find the Flash Partition Table
No vector table needed
Build the fs-boot project
Finalising the FPGA bitstream
Workspace directory structure

Part 76

Create a new PetaLinux software platform
Configure the software platform
Configure the Linux kernel
Configure user applications and system settings
Update the default configuration
Build PetaLinux
Test PetaLinux on the board
Direct kernel boot via JTAG
Indirect kernel boot via u-boot
Running PetaLinux in the QEMU emulator


Part 77

Writing our first application program
Creating a new application
Building the application
Rebuild the PetaLinux software image
Test our new application
Application development


Part 78

Writing and debugging an application program
Compile and build the application
Testing the application
Debugging our application
Prepare the build system for debugging
Rebuild the PetaLinux image
Performing a debug session
Target settings
Setting breakpoints
Running the program
Stepping the program
Finishing the debug session

Part 79

Configuring the Spartan-6 FPGA
Introduction
Internal configuration process
Internal configuration interfaces
External configuration interfaces
Configuring the Spartan-6 upon power-up
LX9 MicroBoard configuration logic
Configure the FPGA from external source
Programming the serial SPI flash
Programmimg via the on-board USB to JTAG circuitry
Programming the SPI flash thorugh JTAG
Master SPI dual and quad commands

Part 80

Booting PetaLinux from SPI flash
Booting from SPI flash run sequence
Copying the u-boot loader to SPI flash
Xilinx Microprocessor Debugger
Downloading the u-boot elf file
Copying the PetaLinux image file
Copying the u-boot image
Booting PetaLinux

Part 81

Installing custom web server content
Create a new application
Adding HTML files
The index.html file
Changing the makefile
De-selecting the uWeb application
Rebuild the PetaLinux system image
Boot the system image

Modify the web page

Part 82

Building a web-enabled application
Create a new application
Using a CGI script
Enable the new application
Build a new image
Booting the new image
Start the httpd service

Files in the httpd directory

Controlling hardware from the web browser

Part 83

Building a virtual machine
Choosing a virtualization product
VirtualBox
Installing VirtualBox
Debian guest OS
Fixes to Debian 6.0.3
VirtualBox setup

Booting Debian

Installing Xilinx Design Suite

Installing PetaLinux SDK
Fixing problems with permissions

USB setup

Editing udev rules

Part 84

Automating the build process
Running Xilinx tools using makefiles
Running the complete flow
Setting up our own make environment
Xilinx tools using scripting
Why using command-line mode
Build flows

Xflow

PlanAhead design and analysis tool

Xtclsh
Scripting languages

Perl

Tcl
Running a Tcl script

Setting up a Tcl script

Running XFLOW
XFLOW syntax

Synthesize our design using Platgen

Using Data2MEM
The complete configuration script

Part 85

Building our System-on-Chip design
Returning to the ISE Project Navigator
Create a new project in ISE
Renaming the constraints file
Starting ISE
ISE Design Suite Center
Importing our XPS design

Generating top HDL source file

Adding the constraints file

Edit the constraints file

Synthesis the design

Run synthesis

Synthesis results
Implementing the design

Translation

Mapping

Placing and routing the design
Synthesis results

Generate Programming File

Part 86

Using Tcl scripts
Enabling all processes
Running the implementation script
Writing Tcl scripts
Running Tcl scripts

Part 87

Using PlanAhead
Starting PlanAhead
Create a new project
Adding BMM file
Implement the design
Running the build program
Running the map program
The implementation passed

Primitives statistics

FPGA device

Generate bitstream

Training
Conclusion


Part 88

The Spartan-6 FPGA
Product specification
Spartan-6 XC6SLX9
Memory Controller Block
DSP48A1 DSP element
DSP48Ai slice in detail
The BRAM block
Clock Management Tile
Phase Lock Loop PLL

Digital Clock Managers

Open implemented design
Zooming in

Slice description
One single slice

One single LUT

Part 89

Writing Linux device drivers
Device drivers for custom hardware
Userspace access via /dev/mem
Running an example
Build a new image
Boot the board
Creating an UIO driver
Configure user application
Configure the kernel to support UIO

Identifying the device to be controlled by UIO

Edit the DTS file
Rebuilding and booting PetaLinux

Load the UIO module
Run gpio-uio-test


Part 90

Using Pmods
Overview
The Digilent Pmod 3-axis accelrometer
The tutorial
The hardware platform
Copy an EDK project
Xilinx Platdorm Studio XPS
Adding the ADI peripheral core
Adding the IP core

The LX9 MicroBoard


Part 91

Writing software to control the accelerometer
Starting SDK
Creating a new C-project
Adding c-program files
Generate a linker script
Edit the c-program
Building the project
Configure the Spartan-6 FPGA
Start the console program

Start program execution




Posted at 14:40 by svenand

 

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