New Horizons









Welcome to my blog

My name is Sven Andersson and I
work as a consultant in embedded
system design, implemented in ASIC
and FPGA.
In my spare time I write this blog
and I hope it will inspire others to
learn more about this fantastic field.
I live in Stockholm Sweden and have
my own company

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and ask questions or make comments
about my blog.



Content

New Horizons
What's new
Starting a blog
Writing a blog
Using an RSS reader

Zynq Design From Scratch
Started February 2014
1 Introduction
Changes and updates
2 Zynq-7000 All Programmable SoC
3 ZedBoard and other boards
4 Computer platform and VirtualBox
5 Installing Ubuntu
6 Fixing Ubuntu
7 Installing Vivado
8 Starting Vivado
9 Using Vivado
10 Lab 1. Create a Zynq project
11 Lab 1. Build a hardware platform
12 Lab 1. Create a software application
13 Lab 1. Connect to ZedBoard
14 Lab 1. Run a software application
15 Lab 1. Benchmarking ARM Cortex-A9
16 Lab 2. Adding a GPIO peripheral
17 Lab 2. Create a custom HDL module
18 Lab 2. Connect package pins and implement
19 Lab 2. Create a software application and configure the PL
20 Lab 2. Debugging a software application
21 Running Linux from SD card
22 Installing PetaLinux
23 Booting PetaLinux
24 Connect to ZedBoad via ethernet
25 Rebuilding the PetaLinux kernel image
26 Running a DHCP server on the host
27 Running a TFTP server on the host
28 PetaLinux boot via U-boot
29 PetaLinux application development
30 Fixing the host computer
31 Running NFS servers
32 VirtualBox seamless mode
33 Mounting guest file system using sshfs
34 PetaLinux. Setting up a web server
35 PetaLinux. Using cgi scripts
36 PetaLinux. Web enabled application
37 Convert from VirtualBox to VMware
38 Running Linaro Ubuntu on ZedBoard
39 Running Android on ZedBoard
40 Lab2. Booting from SD card and SPI flash
41 Lab2. PetaLinux board bringup
42 Lab2. Writing userspace IO device driver
43 Lab2. Hardware debugging
44 MicroZed quick start
45 Installing Vivado 2014.1
46 Lab3. Adding push buttons to our Zynq system
47 Lab3. Adding an interrupt service routine
48 Installing Ubuntu 14.04
49 Installing Vivado and Petalinux 2014.2
50 Using Vivado 2014.2
51 Upgrading to Ubuntu 14.04
52 Using Petalinux 2014.2
53 Booting from SD card and SPI flash
54 Booting Petalinux 2014.2 from SD card
55 Booting Petalinux 2014.2 from SPI flash
56 Installing Vivado 2014.3

Chipotle Verification System
Introduction

EE Times Retrospective Series
It all started more than 40 years ago
My first job as an electrical engineer
The Memory (R)evolution
The Microprocessor (R)evolution

Four soft-core processors
Started January 2012
Introduction
Table of contents
Leon3
MicroBlaze
OpenRISC 1200
Nios II

Using the Spartan-6 LX9 MicroBoard
Started August 2011
Introduction
Table of contents
Problems, fixes and solutions

FPGA Design From Scratch
Started December 2006
Introduction
Table of contents
Index
Acronyms and abbreviations

Actel FPGA design
Designing with an Actel FPGA. Part 1
Designing with an Actel FPGA. Part 2
Designing with an Actel FPGA. Part 3
Designing with an Actel FPGA. Part 4
Designing with an Actel FPGA. Part 5

CAD
A hardware designer's best friend
Zoo Design Platform

Linux
Installing Cobra Command Tool
A processor benchmark

Mac
Porting a Unix program to Mac OS X
Fixing a HyperTerminal in Mac OS X
A dream come true

Bicycling
Stockholm by bike

Running
The New York City Marathon

Skiing/Skating
Kittelfjall Lappland

Tour skating in Sweden and around the world
Top
Introduction
SSSK
Wild skating
Tour day
Safety equipment
A look at the equipment you need
Skate maintenance
Links
Books, photos, films and videos
Weather forecasts

Travel
38000 feet above see level
A trip to Spain
Florida the sunshine state

Photo Albums
Seaside Florida
Ronda Spain
Sevilla Spain
Cordoba Spain
Alhambra Spain
KittelfjÀll Lapland
Landsort Art Walk
Skating on thin ice

Books
100 Power Tips for FPGA Designers

Favorites
Adventures in ASIC
ChipHit
Computer History Museum
DeepChip
Design & Reuse
Dilbert
d9 Tech Blog
EDA Cafe
EDA DesignLine
Eli's tech Blog
Embedded.com
EmbeddedRelated.com
FPGA Arcade
FPGA Blog
FPGA Central
FPGA CPU News
FPGA developer
FPGA Journal
FPGA World
Lesley Shannon Courses
Mac 2 Ubuntu
Programmable Logic DesignLine
OpenCores
Simplehelp
SOCcentral
World of ASIC



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Monday, September 26, 2011
FPGA design from scratch. Part 69
Adding a custom IP to an embedded system

This tutorial demonstrates how to create and add a custom IP to an existing MicroBlaze system using the Xilinx Platform Studio (XPS) Create/Import Peripheral wizard. The system from the previous tutorial will be used as the starting point. The lab will show:
  • How  to create a custom AXI IP using the wizard
  • How to customize the peripheral
  • How to add the core to the project
  • How to write code for the new IP
We will create a Pulse Width Modulator (PWM) IP to control the LEDs intensity. We will use the Create/Import Peripheral wizard in XPS to create the new IP. In XPS go to Hardware->Create or Import Peripheral.


Select flow.





The peripheral will be stored in our XPS project.





Enter the name for the peripheral, axi_pwm





We will use the AXI4-Lite bus interface.





We will use a  software register to control the peripheral. Select User logic register and unselect all other choices.





We will use one 32-bit register to communicate with the PWM hardware.





The IP interconnect (IPIC) uses a set of signals between the user logic and the AXI bus. We will use the default signals already selected.





A bus functional model can be generated to be used in stand-alone IP verification. We skip this part and verify our IP in the system verification.





The wizard will generate a user_logic block in VHDL. We can choose to have it in Verilog if we prefer.





Click finish to create the peripheral.




The new peripheral was created inside the project directory, in the pcores directory.



Files generated

hdl/vhdl/axi_pwm.vhd

This is the template file for your peripheral's top design entity. It configures and instantiates the corresponding design units in the way you indicated in the wizard GUI and hooks it up to the stub user logic where the actual functionalites should get implemented. You are not expected to modify this template file except certain marked places for adding user specific generics and ports.

hdl/vhdl/user_logic.vhd

This is the template file for the stub user logic design entity, either in
VHDL or Verilog, where the actual functionalities should get implemented. Some sample code snippet may be provided for demonstration purpose.

data/axi_pwm_v2_1_0.mpd

This Microprocessor Peripheral Description file contains information of the interface of your peripheral, so that other EDK tools can recognize your peripheral.

data/axi_pwm_v2_1_0.pao

This Peripheral Analysis Order file defines the analysis order of all the HDL
source files that are used to compile your peripheral.


devl/ipiw.opt

This is the option setting file for the wizard batch mode, which should generate the same result as the wizard GUI mode.

Customizing the new peripheral

We will start by adding a new output port called PWM_Out to the axi_pwm.vhd file. Add the following line in the port declaration:   PWM_Out      : out std_logic;



Find the instantiation of the user logic block and add the following line in the port map declaration:   PWM_Out  => PWM_Out,


Adding user code in user_logic.vhd

The user_logiv.vhd file was created for users to place their custom code. The code to access the 32-bit AXI interface register was created by the wizard. In the user_logic .vhd add the following lines:

The port PWM_Out.



The signal declarations:



The VHDL code:



Adding the port to the mpd file

The new external port needs to be added to the definition file for the peripheral in order to be used in XPS. Open the file axi_pwm_v2_1_0.mpd and add the PWM_Out port.



Adding the custom IP to the system

We will add and connect the new cuctom IP to the existing system following the same instructions as in the previous lab. We will remove the GPIO peripheral for the LEDs and connect the PWM peripheral instead.

Open the IP Catalog in the Project Information Area and find the Project Local Cores.




Select the AXI_PWM and add it to the system.




Click on the address tab to view the address range for the new IP.



Delete the GPIO peripheral instance for the LEDs. In the System Assembly, Bus Interfaces view, right-click on the LEDS_4Bit_instance and select Delete Instance. Select "Delete instance but do not remove the nets". Click OK.



This picture shows how to connect our peripheral to the system.


Click on the ports tab. Expand axi_pwm_0 from the list. For the PWM_Out click on the Net column and select <New Connection>. The new name will be axi_pwm_0_PWM_Out.




We will use the PWN_Out signal to control the driving of the four LEDs. We will use concatenation to connect the single output port from the PWM peripheral to the 4 LED driver tri-state signals. Expand the External Ports connection.  For the LEDs_4Bits_TRI_O, replace the current Net entry with the following: <axi_pwm_0_PWM_Out &
axi_pwm_0_PWM_Out & axi_pwm_0_PWM_Out & axi_pwm_0_PWM_Out>.
This will drive all 4 LEDs with the same brightness.



Export to SDK

We need to update the design information for SDK. Go to Project->Export hardware Design to SDK. Select Export Only.




The next step is to write a small program to test the PWM. We will modify the main.c file in the Tutorial_Test project to look like this.



When we run the program and modify the DIP switches the intensity of the LEDs will change.


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