FPGA design from scratch. Part 69
Adding a custom IP to an embedded system
This tutorial demonstrates how to create and add a custom IP to an existing MicroBlaze system using the Xilinx Platform Studio (XPS) Create/Import Peripheral wizard. The system from the previous tutorial will be used as the starting point. The lab will show:
We will create a Pulse Width Modulator (PWM) IP to control the LEDs intensity. We will use the Create/Import Peripheral wizard in XPS to create the new IP. In XPS go to Hardware->Create or Import Peripheral.
- How to create a custom AXI IP using the wizard
- How to customize the peripheral
- How to add the core to the project
- How to write code for the new IP
Select flow.The peripheral will be stored in our XPS project.Enter the name for the peripheral, axi_pwmWe will use the AXI4-Lite bus interface.We will use a software register to control the peripheral. Select User logic register and unselect all other choices.
We will use one 32-bit register to communicate with the PWM hardware.The IP interconnect (IPIC) uses a set of signals between the user logic and the AXI bus. We will use the default signals already selected.A bus functional model can be generated to be used in stand-alone IP verification. We skip this part and verify our IP in the system verification.The wizard will generate a user_logic block in VHDL. We can choose to have it in Verilog if we prefer.
Click finish to create the peripheral.The new peripheral was created inside the project directory, in the pcores directory.Files generatedhdl/vhdl/axi_pwm.vhdThis is the template file for your peripheral's top design entity. It configures and instantiates the corresponding design units in the way you indicated in the wizard GUI and hooks it up to the stub user logic where the actual functionalites should get implemented. You are not expected to modify this template file except certain marked places for adding user specific generics and ports.hdl/vhdl/user_logic.vhd
This is the template file for the stub user logic design entity, either in VHDL or Verilog, where the actual functionalities should get implemented. Some sample code snippet may be provided for demonstration purpose.
This Microprocessor Peripheral Description file contains information of the interface of your peripheral, so that other EDK tools can recognize your peripheral.
This Peripheral Analysis Order file defines the analysis order of all the HDL source files that are used to compile your peripheral.devl/ipiw.opt
This is the option setting file for the wizard batch mode, which should generate the same result as the wizard GUI mode.
Customizing the new peripheral
We will start by adding a new output port called PWM_Out to the axi_pwm.vhd file. Add the following line in the port declaration: PWM_Out : out std_logic;
Find the instantiation of the user logic block and add the following line in the port map declaration: PWM_Out => PWM_Out,
Adding user code in user_logic.vhd
The user_logiv.vhd file was created for users to place their custom code. The code to access the 32-bit AXI interface register was created by the wizard. In the user_logic .vhd add the following lines:
The port PWM_Out.
The signal declarations:
The VHDL code:
Adding the port to the mpd file
The new external port needs to be added to the definition file for the peripheral in order to be used in XPS. Open the file axi_pwm_v2_1_0.mpd and add the PWM_Out port.
Adding the custom IP to the system
We will add and connect the new cuctom IP to the existing system following the same instructions as in the previous lab. We will remove the GPIO peripheral for the LEDs and connect the PWM peripheral instead.
Open the IP Catalog in the Project Information Area and find the Project Local Cores.
Select the AXI_PWM and add it to the system.
Click on the address tab to view the address range for the new IP.
Delete the GPIO peripheral instance for the LEDs. In the System Assembly, Bus Interfaces view, right-click on the LEDS_4Bit_instance and select Delete Instance. Select "Delete instance but do not remove the nets". Click OK.
This picture shows how to connect our peripheral to the system.
Click on the ports tab. Expand axi_pwm_0 from the list. For the PWM_Out click on the Net column and select <New Connection>. The new name will be axi_pwm_0_PWM_Out.
We will use the PWN_Out signal to control the driving of the four LEDs. We will use concatenation to connect the single output port from the PWM peripheral to the 4 LED driver tri-state signals. Expand the External Ports connection. For the LEDs_4Bits_TRI_O, replace the current Net entry with the following: <axi_pwm_0_PWM_Out & axi_pwm_0_PWM_Out & axi_pwm_0_PWM_Out & axi_pwm_0_PWM_Out
>.This will drive all 4 LEDs with the same brightness.
Export to SDK
We need to update the design information for SDK. Go to Project->Export hardware Design to SDK. Select Export Only.
The next step is to write a small program to test the PWM. We will modify the main.c file in the Tutorial_Test project to look like this.
When we run the program and modify the DIP switches the intensity of the LEDs will change.Top Previous Next