My name is Sven Andersson and I
work as a consultant in embedded
system design, implemented in ASIC
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The ETC design will be connected to the MicroBlaze processor through an interface block. In our first design we could use the OPB bus interface but in newer versions of MicroBlaze, the OPB has been replaced with the PLB bus. We will use the Create and Import Peripheral Wizard to help us generate a PLB interface block.
Open the wizard from the Hardware menu in XPS.
We are going to create a template for a new peripheral. Here is the flow we are going to follow.
The peripheral will be part of an XPS project.
Enter a name and version for our peripheral.
We connect the peripheral to the Processor Local Bus (PLB).
The interface must be able to read and write registers and memory blocks. It must also handle interrupts from the peripheral device.
We have only interrupt signal.
There are four registers in the ETC.
And two memory blocks.
Here are the signals in the bus interface. We will keep all of them.
The user_logic is where we are going to add the user specific RTL code.
We are ready to start the generation of our peripheral block.
The files generated are placed in the pcores directory.
The next step will be to modify this interface and add it to the etc block. It will look something like this: