New Horizons

Welcome to my blog

My name is Sven Andersson and I
work as a consultant in embedded
system design, implemented in ASIC
and FPGA.
In my spare time I write this blog
and I hope it will inspire others to
learn more about this fantastic field.
I live in Stockholm Sweden and have
my own company


You are welcome to contact me
and ask questions or make comments
about my blog.


New Horizons
What's new
Starting a blog
Writing a blog
Using an RSS reader

Zynq Design From Scratch
Started February 2014
Changes and updates
Zynq-7000 All Programmable SoC
ZedBoard and other boards
Computer platform and VirtualBox
Installing Ubuntu
Fixing Ubuntu
Installing Vivado
Starting Vivado
Using Vivado
Lab 1. Create a Zynq project
Lab 1. Build a hardware platform
Lab 1. Create a software application
Lab 1. Connect to ZedBoard
Lab 1. Run a software application
Lab 1. Benchmarking ARM Cortex-A9
Lab 2. Adding a GPIO peripheral
Lab 2. Create a custom HDL module
Lab 2. Connect package pins and implement
Lab 2. Create a software application and configure the PL
Lab 2. Debugging a software application
Running Linux from SD card
Installing PetaLinux
Booting PetaLinux
Connect to ZedBoad via ethernet
Rebuilding the PetaLinux kernel image
Running a DHCP server on the host
Running a TFTP server on the host
PetaLinux boot via U-boot
PetaLinux application development
Fixing the host computer
Running NFS servers
VirtualBox seamless mode
Mounting guest file system using sshfs
PetaLinux. Setting up a web server
PetaLinux. Using cgi scripts
PetaLinux. Web enabled application
Convert from VirtualBox to VMware
Running Linaro Ubuntu on ZedBoard
Running Android on ZedBoard
Lab2. Booting from SD card and SPI flash
Lab2. PetaLinux board bringup
Lab2. Writing userspace IO device driver
Lab2. Hardware debugging
MicroZed quick start
Installing Vivado 2014.1
Lab3. Adding push buttons to our Zynq system
Lab3. Adding an interrupt service routine
Installing Ubuntu 14.04
Installing Vivado and Petalinux 2014.2
Using Vivado 2014.2
Upgrading to Ubuntu 14.04
Using Petalinux 2014.2
Booting from SD card and SPI flash
Booting Petalinux from SD card

Chipotle Verification System

EE Times Retrospective Series
It all started more than 40 years ago
My first job as an electrical engineer
The Memory (R)evolution
The Microprocessor (R)evolution

Four soft-core processors
Started January 2012
Table of contents
OpenRISC 1200
Nios II

Using the Spartan-6 LX9 MicroBoard
Started August 2011
Table of contents
Problems, fixes and solutions

FPGA Design From Scratch
Started December 2006
Table of contents
Acronyms and abbreviations

Actel FPGA design
Designing with an Actel FPGA. Part 1
Designing with an Actel FPGA. Part 2
Designing with an Actel FPGA. Part 3
Designing with an Actel FPGA. Part 4
Designing with an Actel FPGA. Part 5

A hardware designer's best friend
Zoo Design Platform

Installing Cobra Command Tool
A processor benchmark

Porting a Unix program to Mac OS X
Fixing a HyperTerminal in Mac OS X
A dream come true

The New York City Marathon

Kittelfjall Lappland

Tour skating in Sweden and around the world
Wild skating
Tour day
Safety equipment
A look at the equipment you need
Skate maintenance
Books, photos, films and videos
Weather forecasts

38000 feet above see level
A trip to Spain
Florida the sunshine state

Photo Albums
Seaside Florida
Ronda Spain
Sevilla Spain
Cordoba Spain
Alhambra Spain
Kittelfjäll Lapland
Landsort Art Walk
Skating on thin ice

100 Power Tips for FPGA Designers

Adventures in ASIC
Computer History Museum
Design & Reuse
d9 Tech Blog
EDA Cafe
EDA DesignLine
Eli's tech Blog
FPGA Arcade
FPGA Central
FPGA developer
FPGA Journal
FPGA World
Lesley Shannon Courses
Mac 2 Ubuntu
Programmable Logic DesignLine
World of ASIC

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Tuesday, September 30, 2014
What's New
2014-08-20 Restarting my blog
2014-07-18 Vacation time. No access to ZedBoard
2014-05-20 As you can see to the left, there is an advertisement added to my blog. Please contact me if your company would like to place an ad at the same place.
2014-05-18 I am going social. Share buttons have been added to Facebook, LinkedIn, Twitter and Google social networking sites.
2014-05-06 Clive Maxfield at EE Times writes about my blog once more.
2014-03-15 The Zynq blog has been added to the Xilinx Wiki.
2014-03-13 A link to my Zynq blog has been added in
2014-03-11 I have written an article for EE Times about my Zynq blog
2014-02-18 Xilinx writes about my Zynq blog
2014-02-10 ElektronikTidningen writes about my Zynq blog (in Swedish)
2014-02-06 Starting a new blog called "Zynq Design From Scratch"
2014-01-14 Updated

Posted at 07:26 by svenand
Comments (4)  

Monday, September 29, 2014
Zynq design from scratch. Part 1.

Almost a year ago I received a parcel by post from US. When I opened the parcel I found this box.

The ZedBoard was a present from someone involved in promoting the new Zynq device from Xilinx, but with no strings attached. At that time I was busy working as an ASIC designer and had no time to play with the board. It wasn't until December in 2013 that I had a chance to unpack the box and power-up the ZedBoard.

At that time I got an email from Per and Andreas at  Silica (Avnet) here in Stockholm, where they offered a one day hands-on training class on the Zynq-7000 using the ZedBoard, part of the "Xilinx Speedway Design Workshops". Here is what this workshop covered:

Introduction to the Zynq-7000 in Vivado AP SoC

"This class demonstrates the techniques and tools used to create a basic Zynq-7000 AP SoC design. Through a series of instructor presentations and hands-on labs, hardware and firmware developers will learn the required steps for creating a complete Zynq-7000 AP SoC design on ZedBoard. The Zynq-7000 AP SoC architecture is explained, including the ARM® Cortex™-A9 processing system (PS) and the 7 series programmable logic (PL). The course also details the individual components that comprise the PS such as I/O peripherals, clocking, interrupt, AXI interfaces and memory controllers. Emphasis will be placed on efficient PL-to-PS interfacing including processing interrupts generated from a PL peripheral. To complete the design flow, the critical steps of hardware and software debugging techniques will be shown".

This training session was the head start I needed. I went home and started to play with my ZedBoard. At the same time a decided to write this blog and here we are. All of you who have read my "FPGA design from scratch" blog will feel at home. I will follow the same idea and describe the whole design flow in an easy to understand fashion.

Reading instruction

Blog entries should be read from 1 onwards in numerical order to get the full story. At the end of every blog entry there are three links called:   Top   Previous  Next

  • Top takes us to the top of the current blog entry.
  • Previous takes us to the previous entry
  • Next takes us to the next entry 

Table of content

In the left sidebar there is a clickable TOC where you can access all blog entries:

Learning by doing

Aristotle once said, "For the things we have to learn before we can do them, we learn by doing them". So true. Let's practice some learning by doing.

Not reinventing the wheel

We will use a lot of material already available from Xilinx, Avnet and other companies. We will  try to find solutions to our problems by searching on internet.

A picture is worth a thousand words

I will use a lot of pictures in my blog. I think picture many times illustrates much better what is going on in my experiments.

An interactive meeting place

A would like the blog to be interactive and not a one-way document. I invite all of you,
newbies to professionals to ask questions, make comments and suggestions for subjects you are missing.


It wouldn't make sense writing a tutorial like this and not using Avnet's and Xilinx's in-depth knowledge about their products found in their web pages, user guides and other documents. I would like to thank Avnet and Xilinx for allowing me to use images and text from their documents and to link to their web pages.


Here is a link to the Xilinx
documentation library.


Xilinx provides recorded
E-Learning for courses at our convenience. They are available at no charge.


There are several forums discussing FPGA design. The Xilinx forum is one of them. The Avnet forum and ZedBoard forum are two others.


Subscribe for FREE to the new Xcell Journal Digital. Here are links to old XCell magazines.

Search engines

There are a number of dedicated search engines, searching for FPGA information.
FPGASeek is one ChipHit is another.

Support, Answers Database

You may find an answer to your question in the
Xilinx support page.


Xilinx provides targeted, high-quality education services designed by experts in programmable logic design, and delivered by Xilinx-qualified trainers. They offer instructor-led classes (both in person and online) and recorded e-learning for self-paced training. Some courses are completely free!  Doulos is running a 3 days course called "ARM Cortex-A9 for Zynq System Design".


To post a question to Xilinx you should use


The goal of the Xilinx Wiki site is to provide technical information and collaborate with the community on Open Source projects that are being done in Xilinx. Xilinx also provides a Git repository to help with open source development and collaboration, and all sources can be downloaded from the GIT repository

Xcell Daily Blog

Here is Xilinx own blog, Xcell Daily Blog.

Xilinx University Program

The Xilinx University Program (XUP) includes academics from top-tiered universities across the world. XUP provides top-quality teaching materials that are easily accessible to professors to incorporate into their curriculum. XUP offers workshops to professors and academic staff at no cost. These workshops are conducted by Xilinx as well as application area experts, providing in-depth practical and theoretical aspect of FPGA technology.

What to expect from this blog

You are welcome to follow my blog. I hope it will give you a head start in using the Zynq-7000 All Programmable SoC. Here is what I plan to do first.

  1. Select a computer to use. In my case a MacBook Air
  2. Setup a virtual machine using VirtualBox.
  3. Install Ubuntu Linux 13.10 64bit in the virtual machine
  4. Install Xilinx Vivado Design Suite (the Linux version)
  5. Use the Vivado software to generate a configuration bitstream
  6. Use Vivado SDK to write a simple program
  7. Connect the ZedBoard to the computer
  8. Configure the Zynq FPGA part and load the program
  9. Run the program that will light up some LEDs on the board

Just one last thing

We are going to have fun.

This time you are not left alone. Click Next to continue reading.

Top   Previous   Next

Posted at 11:50 by svenand
Comments (4)  

Sunday, September 28, 2014
Zynq design from scratch. Part 54.
Booting Petalinux from SD card

We will create a new Petalinux image file and store it on the SD card. When we power up the ZedBoard it will automatically start up.

Board bring up

We will follow the Petalinux Board Bringup Guide to create the new Petalinux image.


Posted at 19:28 by svenand
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Saturday, September 27, 2014
Zynq design from scratch. Part 53.
Booting from SD card and SPI flash

We will follow the instructions in part 40.

Create the first stage bootloader

The first step is to create the FSBL application. This is a C program that embeds all the Zynq internal register settings that were established during the Vivado Block Design. We start Xlinx SDK and make sure we have exported the lab2 design from Vivado and that we have setup the Board Support Package (BSP).

->xsdk &

The SDK program will open with the setup we used in our lab2 experiment. Before creating the FSBL file we have to add a library file used by the FSBL c-program. Select from the top menu:

Xilinx Tools-> Board Support Package Settings

Click OK to open the Board Support Package Settings. We will add the libraries xilffs and xilrsa.

We are now ready to generate the FSBL program.

1. Select New->Application Project

2. Click next and select Zynq FSBL. Click Finish.

3. When the generation has finished there is a new entry in the Project Explorer namned fsbl_0.

4. Right-click the fsbl_0 entry and select: Build Configurations->Set Active->Release. The release configuration will have less overhead.

5. Build the release configuration by right-clicking and select Build Project.

6. Here is the result:


Generate the boot image

The next step is to create a non-volatile boot image for ZedBoard. The ZedBoard has two non-volatile bootable sources, QSPI flash and SD Card.

1. In the Project Explorer select LED_Dimmer

2. From the top menu select: Xilinx Tools->Create Zynq Boot Image

3. Add the files shown in the Boot images partitions window in that order.

4. Click Create Image. The BOOT.bin file is stored in the bootimage directory.

5. Copy the BOOT.bin file to an SD card. Insert the card in the ZedBoard card holder and set the strapping to boot from SD card (see part 40 for more information).

6. Connect a terminal

7. Power on the board.

8. The same BOOT.bin file can also be used for programming the SPI flash memory.

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Posted at 09:11 by svenand
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Thursday, September 25, 2014
Zynq design from scratch. Part 52.
Using Petalinux 2014.2

Upgrading to newer versions of software is not always an easy task. Upgrading one operating system and three software tools at the same time will not make it easier. This is what we have now:
  • Ubuntu 14.04
  • Vivado 2104.2
  • Xilinx SDK 2104.2
  • Petalinux 2014.2

I will start by rerunning part 23 (Booting Petalinux) to see if things still work. Here is the Petalinux BSP for the ZedBoard.

We will start by loading and booting the pre-built Petalinux image.

--> source /opt/PetaLinux/petalinux-2014.2-final/
--> cd ...../Avnet-Digilent-ZedBoard-2014.2
--> petalinux-boot --jtag --prebuilt 3

The FPGA is configured and the image file is downloaded, but the system is not booting. Here is the display on the terminal screen.

After looking around I found this explanation
in the Xilinx forum:  Now i found out that the processor was simply in "stopped" mode. I used XMD to send the JTAG "con" command to continue the execution and everything works fine. I did it with the following commands:

After a few seconds the booting starts and the following is displayed on the terminal screen.

Rebuilding the Petalinux kernel image

Now let's see if we can rebuild the kernel image and boot it on our ZedBoard. We will follow part 25 and repeat all steps. We first run the petalinux-build command to compile the software image.

-> cd <Project Dir>/
-> source /opt/PetaLinux/
-> petalinux-build

The build fails showing this error messages. It seems we are missing the file predefs.h in Ubuntu 14.04. A quick fix is to copy the file /usr/include/stdc-predef.h to the directory /usr/include/x86_64-linux-gnu/bits and rename it to predefs.h.This fix may need some more investigation, but for now it works.

Now the build finishes without any errors.

Make a prebuilt package

We will use the command petalinux-package to packages all files into a prebuilt package and then use the command: petalinix-boot --jtag --prebuilt 3 to boot the ZedBoard. See part 25 for more information. After we have made the package we can follow the instructions from the first part of this blog.

->petalinux-package --prebuilt --fpga download.bit


Upgrading to new software is never a painless experience but with the help from the community there is almost always a solution to be found. Thanks Martin for helping out and a message to Xilinx to fix the bug.

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Posted at 20:20 by svenand
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Wednesday, September 24, 2014
Zynq design from scratch. Part 51.
Upgrading to Ubuntu 14.04

Every time when starting up Ubuntu I get this popup window. I think it is time to upgrade to Ubuntu 14.04. Before starting the upgrade we make a backup of the complete virtual image, just in case something would happen.

Let's click the Upgrade button and see what happens.

When we hit the Upgrade button the installation starts by fetching all the files from the Ubuntu download server.

The the download has finished the following window appears.

Clicking the Start Upgrade button will start the installation which will take 2-3 hours. When finished we have to restart the system.

We are running Ubuntu 14.04 LTS.


Both Vivado 2014.2 and SDK 2014.2 run perfectly fine in Ubuntu 14.04. Wake up Xilinx, time to support Ubuntu.

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Posted at 14:03 by svenand
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Thursday, September 18, 2014
Zynq design from scratch. Part 50.
Using Vivado 2014.2

I wanted to convert my LED_Controller design to run in Vivado 2014.2 but ran into problems when trying to synthesis the design. Vivado 2014.2 crashed giving no clue what was the problem, so I decided to start from scratch and build my design once more. I will follow the same procedure as last time (Lab1) and only document the changes that have been made to the design flow. Let's get started again.

--> vivado &

We will create a new project. Here is the result.

This window will appear when starting the Run Block Automation process.

Here is what the design should look like.

Build and export to SDK

Follow the instructions in part 11 to build the hardware. To export to SDK select from the File menu->Export->Export Hardware

Click OK. Only one file called system_wrapper.hdf will be exported.

Starting SDK

From the Vivado File menu select: Launch SDK.

When starting SDK from Vivado, the file system_wrapper.hdf will be read automatically and the system_wrapper_hw_platform will be generated. Here is the result.

Create a software application

Follow part 12 to create a Hello World software application. When starting SDK from the terminal select the following workspace.

Running lab2

I was able to repeat lab2 without any problems following the instruction in the earlier blog entries.


Vivado 2014.2 has streamlined a few things but hasn't introduced any major changes.

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Posted at 09:19 by svenand
Comment (1)  

Monday, August 18, 2014
Zynq design from scratch. Part 49.
Installing Vivado 2014.2 and PetaLinux 2014.2

Xilinx has released new versions of Vivado and PetaLinux. Let's download and install the new releases and use them in a new project.

Download and install Vivado 2014.2

This time we will use the Web Install Client, a small program that can be downloaded from the Xilinx download page. Here is a video you can watch to learn more about the new download program.

Click the "Linux 64-bit Web Install Client" link.

Click Save File. The file will be downloaded to the Download directory if we haven't specified another directory. Make the file executable and and run it using sudo.

This will start the Xilinx Vivado installer.

Enter User ID and Password and click Next.

Accept the license agreements.

Select what to download.

Customize the installation by adding thing we need and remove things we don't need.

Look at the download size. Only 2.59 GB. Select destination directory.

See part 45 for the rest of the installation.

Installing Petalinux

We will follow the description in part 22 and install Petalinux 2014.2.

Download Board Support Package

Running the installer

Make the installer executable.

-> chmod 755

-> sudo ./ /opt/PetaLinux

Setup Vivado and PetaLinux SDK working environment

To setup the working environment we source the setup scripts:

-> source /opt/Xilinx/Vivado/2014.2/
-> source /opt/Xilinx/SDK/2014.2/
-> source /opt/PetaLinux/petalinux-v2014.2-final/

Run the BSP install script

To install the board support packages we run the following commands:

-> cd $HOME/Projects/PetaLinux
-> petalinux-create -t project -s /home/svenand/Downloads/avnet-digilent-Zedboard-v2014.2-final.bsp

Now we are ready to load and boot PetaLinux on our ZedBoard. See part 23.

To rebuild the linux kernel see part 25.

Make sure you have installed the following libraries before building a new kernel.

  • lib32gomp1
  • lib32ncursesw5

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Posted at 21:39 by svenand
Comments (3)  

Thursday, June 05, 2014
Zynq design from scratch. Part 48.
Measuring Linux usage

I know it is impossible to measure and figure out the real usage of different Linux distributions, but there is data collected from the web that can give us some clues. RedMonk has put together the following graph taking data from different sources.

After studying these figures and looking around in my neighbourhood I think one thing is clear. Debian together with its derivatives (Ubuntu and Mint) is by far the most popular Linux distribution in the world.

Xilinx Linux support

So why is Xilinx not supporting Debian? I don't know. But this doesn't stop us from using Ubuntu to run Xilinx software. I have been doing it since 2007 when I started using Xilinx design tools and continued up until today. So let's install Ubuntu 14.04.

Installing Ubuntu 14.04 LTS

The latest version of the Ubuntu operating system for desktop PCs and laptops, Ubuntu 14.04 LTS comes with five years of security and maintenance updates, guaranteed.

Follow the instructions in part 5 to install Ubuntu.
Yes it is that easy.

Fixing Ubuntu

Folllow the instructions in part 6 to perform the necessary fixes to make the Vivado run smoothly.

Installing Vivado

Follow the instructions in part 7 and part 45 to install Vivado and SDK and you are up a running in no time at all.

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Posted at 09:36 by svenand
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Sunday, May 18, 2014
Zynq design from scratch. Part 47.
LED_Pushbuttons application program

Starting Xilinx SDK

--> xsdk &

Re-generate BSP sources

After we have modified our hardware design and added the interrupt logic we need to re-generate the Board Support Package to incorporate support for interrupts. Open the system.mss file, if not already opened and click Re-generate BSP Sources.

Create a new application program

We will keep the LED_Dimmer application as is and create a new application called LED_Pushbuttons.

Writing the program

We will use the LED_Dimmer c-program as a starting point and add support for push buttons and add an Interrupt Service Routine (ISR).

Not reinventing the wheel

Let's find some good examples that can help us implement the interrupt handling in our application. Open system.mss and click on examples for the axi_gpio_0 peripheral.

We will take a closer look at the xgpio_intr_example.c file.

My implementation

This is what I came up with. Take a look. Let's compile and run the program.  See part 19 for more information.

Here is the result.

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Posted at 16:18 by svenand
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