2014-10-08 Thank you all my readers. During the last 8 months you have visited my blog 49 000 times and looked at 150 000 pages.
2014-10-07 Adam Taylor is celebrating the first year anniversary of his Xcell Daily blog
2014-08-20 Restarting my blog
2014-07-18 Vacation time. No access to ZedBoard
2014-05-20 As you can see to the left, there is an advertisement added to my blog. Please contact me if your company would like to place an ad at the same place.
2014-05-18 I am going social. Share buttons have been added to Facebook, LinkedIn, Twitter and Google social networking sites.
2014-05-06 Clive Maxfield at EE Times writes about my blog once more.
2014-03-15 The Zynq blog has been added to the Xilinx Wiki.
2014-03-13 A link to my Zynq blog has been added in ZedBoard.org
2014-03-11 I have written an article for EE Times about my Zynq blog
2014-02-18 Xilinx writes about my Zynq blog
2014-02-10 ElektronikTidningen writes about my Zynq blog (in Swedish)
2014-02-06 Starting a new blog called "Zynq Design From Scratch"
2014-01-14 Updated wildskating.com
Posted at 07:26 by
Thursday, October 16, 2014
Zynq design from scratch. Part 1.
Almost a year ago I received a parcel by post from US. When I opened the parcel I found this box.
The ZedBoard was a present from someone involved in promoting the new Zynq device from Xilinx, but with no strings attached. At that time I was busy working as an ASIC designer and had no time to play with the board. It wasn't until December in 2013 that I had a chance to unpack the box and power-up the ZedBoard.
At that time I got an email from Per and Andreas at Silica (Avnet) here in Stockholm, where they offered a one day hands-on training class on the Zynq-7000 using the ZedBoard, part of the "Xilinx Speedway Design Workshops". Here is what this workshop covered:
Introduction to the Zynq-7000 in Vivado AP SoC
"This class demonstrates the techniques and tools used to create a basic Zynq-7000 AP SoC design. Through a series of instructor presentations and hands-on labs, hardware and firmware developers will learn the required steps for creating a complete Zynq-7000 AP SoC design on ZedBoard. The Zynq-7000 AP SoC architecture is explained, including the ARM® Cortex™-A9 processing system (PS) and the 7 series programmable logic (PL). The course also details the individual components that comprise the PS such as I/O peripherals, clocking, interrupt, AXI interfaces and memory controllers. Emphasis will be placed on efficient PL-to-PS interfacing including processing interrupts generated from a PL peripheral. To complete the design flow, the critical steps of hardware and software debugging techniques will be shown".
This training session was the head start I needed. I went home and started to play with my ZedBoard. At the same time a decided to write this blog and here we are. All of you who have read my "FPGA design from scratch" blog will feel at home. I will follow the same idea and describe the whole design flow in an easy to understand fashion.
Blog entries should be read from 1 onwards in numerical order to get the full story. At the end of every blog entry there are three links called: Top Previous Next
- Top takes us to the top of the current blog entry.
- Previous takes us to the previous entry
- Next takes us to the next entry
Table of content
In the left sidebar there is a clickable TOC where you can access all blog entries:
Learning by doing
Aristotle once said, "For the things we have to learn before we can do them, we learn by doing them". So true. Let's practice some learning by doing.
Not reinventing the wheel
We will use a lot of material already available from Xilinx, Avnet and other companies. We will try to find solutions to our problems by searching on internet.
A picture is worth a thousand words
I will use a lot of pictures in my blog. I think picture many times illustrates much better what is going on in my experiments.
An interactive meeting place
A would like the blog to be interactive and not a one-way document. I invite all of you, newbies to professionals to ask questions, make comments and suggestions for subjects you are missing.
It wouldn't make sense writing a tutorial like this and not using Avnet's and Xilinx's in-depth knowledge about their products found in their web pages, user guides and other documents. I would like to thank Avnet and Xilinx for allowing me to use images and text from their documents and to link to their web pages.
Here is a link to the Xilinx documentation library.
Xilinx provides recorded E-Learning for courses at our convenience. They are available at no charge.
There are several forums discussing FPGA design. The Xilinx forum is one of them. The Avnet forum and ZedBoard forum are two others.
Subscribe for FREE to the new Xcell Journal Digital. Here are links to old XCell magazines.
There are a number of dedicated search engines, searching for FPGA information. FPGASeek is one ChipHit is another.
Support, Answers Database
You may find an answer to your question in the Xilinx support page.
Xilinx provides targeted, high-quality education services designed by experts in programmable logic design, and delivered by Xilinx-qualified trainers. They offer instructor-led classes (both in person and online) and recorded e-learning for self-paced training. Some courses are completely free! Doulos is running a 3 days course called "ARM Cortex-A9 for Zynq System Design".
To post a question to Xilinx you should use WebCase.
The goal of the Xilinx Wiki site is to provide technical information and collaborate with the community on Open Source projects that are being done in Xilinx. Xilinx also provides a Git repository to help with open source development and collaboration, and all sources can be downloaded from the GIT repositoryXcell Daily Blog
Here is Xilinx own blog, Xcell Daily Blog.
Xilinx University Program
The Xilinx University Program (XUP) includes academics from top-tiered universities across the world. XUP provides top-quality teaching materials that are easily accessible to professors to incorporate into their curriculum. XUP offers workshops to professors and academic staff at no cost. These workshops are conducted by Xilinx as well as application area experts, providing in-depth practical and theoretical aspect of FPGA technology.
What to expect from this blog
You are welcome to follow my blog. I hope it will give you a head start in using the Zynq-7000 All Programmable SoC. Here is what I plan to do first.
- Select a computer to use. In my case a MacBook Air
- Setup a virtual machine using VirtualBox.
- Install Ubuntu Linux 13.10 64bit in the virtual machine
- Install Xilinx Vivado Design Suite (the Linux version)
- Use the Vivado software to generate a configuration bitstream
- Use Vivado SDK to write a simple program
- Connect the ZedBoard to the computer
- Configure the Zynq FPGA part and load the program
- Run the program that will light up some LEDs on the board
Just one last thing
We are going to have fun.
This time you are not left alone. Click Next to continue reading.
Top Previous Next
Posted at 11:50 by
Tuesday, October 14, 2014
Zynq design from scratch. Part 56.
Installing Vivado 2014.3We will follow the instructions in part 49. When we start the installer comes the big surprise. Finally Xilinx is supporting Ubuntu. Congratulations!
When the installation has finished we execute the following commands:
-> sudo chmod -R 777 $HOME/.Xilinx/Vivado/2014.3
-> source /opt/Xilinx/Vivado/2014.3/settings64.sh
-> vivado &
We are up and running.
Posted at 10:54 by
Monday, September 29, 2014
Zynq design from scratch. Part 55.
Booting PetaLinux 2014.2 from QSPI flash
We will start by writing the BOOT.bin file (generated in part 53) to the QSPI flash using the flash writer included in SDK.
1. Set the jumpers to JTAG mode.
2. Start SDK and select from the Xilinx Tools menu "Program Flash". This window will be displayed.
3. Browse for the image file (BOOT.bin) and click Program. This will put the BOOT.bin file in the QSPI flash starting at the first address.
4. Set the jumpers to boot from flash memory.
5. Connect a terminal and power on the ZedBoard. The boot process will start from the QSPI flash and load U-Boot. The bootcmd (run sdboot) will be executed and the booting will continue from the SD card.
6. We now have to figure out how and where to put the linux image file in the QSPI flash and then copy it to the system memory and boot PetaLinux.
7. Using the petalinux-config command we can find out the flash memory fixed partitions.
8. I will ask Xilinx for help.
Top Previous Next
Posted at 12:54 by
Sunday, September 28, 2014
Zynq design from scratch. Part 54.
Posted at 19:28 by
Saturday, September 27, 2014
Zynq design from scratch. Part 53.
Thursday, September 25, 2014
Zynq design from scratch. Part 52.
Using Petalinux 2014.2
Upgrading to newer versions of software is not always an easy task. Upgrading one operating system and three software tools at the same time will not make it easier. This is what we have now:
- Ubuntu 14.04
- Vivado 2104.2
- Xilinx SDK 2104.2
- Petalinux 2014.2
I will start by rerunning part 23 (Booting Petalinux) to see if things still work. Here is the Petalinux BSP for the ZedBoard.
We will start by loading and booting the pre-built Petalinux image.
--> source /opt/PetaLinux/petalinux-2014.2-final/settings.sh
--> cd ...../Avnet-Digilent-ZedBoard-2014.2
--> petalinux-boot --jtag --prebuilt 3
The FPGA is configured and the image file is downloaded, but the system is not booting. Here is the display on the terminal screen.
After looking around I found this explanation in the Xilinx forum: Now i found out that the processor was simply in "stopped" mode. I used XMD to send the JTAG "con" command to continue the execution and everything works fine. I did it with the following commands:
After a few seconds the booting starts and the following is displayed on the terminal screen.
Rebuilding the Petalinux kernel image
Now let's see if we can rebuild the kernel image and boot it on our ZedBoard. We will follow part 25 and repeat all steps. We first run the petalinux-build command to compile the software image.
-> cd <Project Dir>/Avnet-Digilent-ZedBoard-2014.2
-> source /opt/PetaLinux/petalinux-v2014.2-final/settings.sh
The build fails showing this error messages. It seems we are missing the file predefs.h in Ubuntu 14.04. A quick fix is to copy the file /usr/include/stdc-predef.h to the directory /usr/include/x86_64-linux-gnu/bits and rename it to predefs.h.This fix may need some more investigation, but for now it works.
Now the build finishes without any errors.
Make a prebuilt package
We will use the command petalinux-package to packages all files into a prebuilt package and then use the command: petalinix-boot --jtag --prebuilt 3 to boot the ZedBoard. See part 25 for more information. After we have made the package we can follow the instructions from the first part of this blog.
->petalinux-package --prebuilt --fpga download.bit
Upgrading to new software is never a painless experience but with the help from the community there is almost always a solution to be found. Thanks Martin for helping out and a message to Xilinx to fix the bug.
Top Previous Next
Posted at 20:20 by
Wednesday, September 24, 2014
Zynq design from scratch. Part 51.
Posted at 14:03 by
Thursday, September 18, 2014
Zynq design from scratch. Part 50.
Posted at 09:19 by
Zynq design from scratch. Part 49.
Posted at 21:39 by